WO2008086366A3 - Semiconductor device - Google Patents

Semiconductor device Download PDF

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Publication number
WO2008086366A3
WO2008086366A3 PCT/US2008/050532 US2008050532W WO2008086366A3 WO 2008086366 A3 WO2008086366 A3 WO 2008086366A3 US 2008050532 W US2008050532 W US 2008050532W WO 2008086366 A3 WO2008086366 A3 WO 2008086366A3
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WO
WIPO (PCT)
Prior art keywords
region
regions
dielectric regions
pair
dielectric
Prior art date
Application number
PCT/US2008/050532
Other languages
French (fr)
Other versions
WO2008086366A2 (en
Inventor
Mohamed N Darwish
Original Assignee
Maxpower Semiconductor Inc
Mohamed N Darwish
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Maxpower Semiconductor Inc, Mohamed N Darwish filed Critical Maxpower Semiconductor Inc
Priority to JP2009545646A priority Critical patent/JP5479915B2/en
Priority to EP08727446A priority patent/EP2109892A4/en
Priority to CN2008800019458A priority patent/CN101689562B/en
Publication of WO2008086366A2 publication Critical patent/WO2008086366A2/en
Publication of WO2008086366A3 publication Critical patent/WO2008086366A3/en

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Abstract

A semiconductor structure includes a number of semiconductor regions, a pair of dielectric regions and a pair of terminals. The first and second regions of the structure are respectively coupled to the first and second terminals. The third region of the structure is disposed between the first and second regions. The dielectric regions extend into the third region. A concentration of doping impurities present in the third region and a distance between the dielectric regions define an electrical characteristic of the structure. The electrical characteristic of the structure is independent of the width of the dielectric regions width. The first and second regions are of opposite conductivity types. The structure optionally includes a fourth region that extends into the third region, and surrounds a portion of the pair of dielectric regions. The interface region between the dielectric regions and the fourth region includes intentionally introduced charges.
PCT/US2008/050532 2007-01-09 2008-01-08 Semiconductor device WO2008086366A2 (en)

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US20130267080A1 (en) 2013-10-10
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US8420483B2 (en) 2013-04-16
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US20080191307A1 (en) 2008-08-14
CN101689562A (en) 2010-03-31
JP2015092593A (en) 2015-05-14
EP2109879A2 (en) 2009-10-21
EP2109892A4 (en) 2011-03-23
US20120161226A1 (en) 2012-06-28
US20140199814A1 (en) 2014-07-17
KR20090116701A (en) 2009-11-11
JP5666135B2 (en) 2015-02-12
WO2008086366A2 (en) 2008-07-17
KR20090116702A (en) 2009-11-11
US8629493B2 (en) 2014-01-14
EP2109892A2 (en) 2009-10-21
US8618599B2 (en) 2013-12-31
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CN101689562B (en) 2013-05-15
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US20130168762A1 (en) 2013-07-04
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US20190051743A1 (en) 2019-02-14
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