WO2008097932A3 - Die apparatus having configurable input/output and control method thereof - Google Patents

Die apparatus having configurable input/output and control method thereof Download PDF

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Publication number
WO2008097932A3
WO2008097932A3 PCT/US2008/052965 US2008052965W WO2008097932A3 WO 2008097932 A3 WO2008097932 A3 WO 2008097932A3 US 2008052965 W US2008052965 W US 2008052965W WO 2008097932 A3 WO2008097932 A3 WO 2008097932A3
Authority
WO
WIPO (PCT)
Prior art keywords
output
control method
die apparatus
configurable input
configurable
Prior art date
Application number
PCT/US2008/052965
Other languages
French (fr)
Other versions
WO2008097932A2 (en
Inventor
Behnam Malekkhosravi
Daniel J Woodward
David Ian West
Original Assignee
Rapid Bridge Llc
Behnam Malekkhosravi
Daniel J Woodward
David Ian West
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rapid Bridge Llc, Behnam Malekkhosravi, Daniel J Woodward, David Ian West filed Critical Rapid Bridge Llc
Priority to JP2009549195A priority Critical patent/JP2010518630A/en
Priority to CN200880004244XA priority patent/CN101617314B/en
Publication of WO2008097932A2 publication Critical patent/WO2008097932A2/en
Publication of WO2008097932A3 publication Critical patent/WO2008097932A3/en

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17736Structural details of routing resources
    • H03K19/17744Structural details of routing resources for input/output signals

Abstract

A metal configurable I/O structure for an integrated circuit is disclosed. The metal configurable I/O structure may be configured for one of any of a plurality of I/O specifications. Preferably a common voltage reference and a common current reference is generated for provision to a plurality of I/O structures.
PCT/US2008/052965 2007-02-06 2008-02-04 Die apparatus having configurable input/output and control method thereof WO2008097932A2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2009549195A JP2010518630A (en) 2007-02-06 2008-02-04 Die apparatus having configurable input / output and control method thereof
CN200880004244XA CN101617314B (en) 2007-02-06 2008-02-04 Die apparatus having configurable input/output and control method thereof

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/672,013 US7642809B2 (en) 2007-02-06 2007-02-06 Die apparatus having configurable input/output and control method thereof
US11/672,013 2007-02-06

Publications (2)

Publication Number Publication Date
WO2008097932A2 WO2008097932A2 (en) 2008-08-14
WO2008097932A3 true WO2008097932A3 (en) 2008-09-25

Family

ID=39675619

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2008/052965 WO2008097932A2 (en) 2007-02-06 2008-02-04 Die apparatus having configurable input/output and control method thereof

Country Status (5)

Country Link
US (2) US7642809B2 (en)
JP (2) JP2010518630A (en)
CN (1) CN101617314B (en)
TW (1) TWI472157B (en)
WO (1) WO2008097932A2 (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100263200A1 (en) * 2005-11-22 2010-10-21 Lex Kosowsky Wireless communication device using voltage switchable dielectric material
US20080029405A1 (en) * 2006-07-29 2008-02-07 Lex Kosowsky Voltage switchable dielectric material having conductive or semi-conductive organic material
WO2008036984A2 (en) * 2006-09-24 2008-03-27 Shocking Technologies Inc Technique for plating substrate devices using voltage switchable dielectric material and light assistance
US20090050856A1 (en) * 2007-08-20 2009-02-26 Lex Kosowsky Voltage switchable dielectric material incorporating modified high aspect ratio particles
US7882453B2 (en) * 2007-10-17 2011-02-01 Rapid Bridge Llc Semiconductor device metal programmable pooling and dies
US8206614B2 (en) 2008-01-18 2012-06-26 Shocking Technologies, Inc. Voltage switchable dielectric material having bonded particle constituents
US20090220771A1 (en) * 2008-02-12 2009-09-03 Robert Fleming Voltage switchable dielectric material with superior physical properties for structural applications
US8203421B2 (en) 2008-04-14 2012-06-19 Shocking Technologies, Inc. Substrate device or package using embedded layer of voltage switchable dielectric material in a vertical switching configuration
TW201229799A (en) * 2010-11-07 2012-07-16 Shocking Technologies Inc System and method for protecting a computing device using VSD material, and method for designing same
US8539420B2 (en) * 2011-07-05 2013-09-17 Xilinx, Inc. Method and apparatus for self-annealing multi-die interconnect redundancy control
US8604826B2 (en) * 2011-12-16 2013-12-10 Advanced Micro Devices, Inc. Bias compensation method and system for minimizing process, voltage and temperature corner variations
US20140126665A1 (en) * 2012-11-06 2014-05-08 Ati Technologies Ulc Output driver with adjustable voltage swing
US9270268B2 (en) 2013-01-02 2016-02-23 International Business Machines Corporation Compensated impedance calibration circuit
US10309838B2 (en) * 2016-09-08 2019-06-04 Qualcomm Incorporated Temporal temperature sensor position offset error correction
CN107766634A (en) * 2017-10-12 2018-03-06 郑州云海信息技术有限公司 A kind of optimization BGA power distributions improve the method and chip of high speed signaling quality

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US20030146774A1 (en) * 2002-02-07 2003-08-07 International Business Machines Corporation ASIC architechture for active-compensation of a programmable impedance I/O
US20060253825A1 (en) * 2005-05-09 2006-11-09 Lsi Logic Corporation Relocatable mixed-signal functions

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JP3299260B2 (en) * 1990-10-10 2002-07-08 株式会社日立製作所 Semiconductor integrated circuit device
JPH05167425A (en) * 1991-12-13 1993-07-02 Sharp Corp Input circuit compatible with multi-power supply
KR0130037B1 (en) * 1993-12-18 1998-04-06 김광호 Semiconductor integrated circuit input buffer
US5825202A (en) * 1996-09-26 1998-10-20 Xilinx, Inc. Integrated circuit with field programmable and application specific logic areas
US6225143B1 (en) 1998-06-03 2001-05-01 Lsi Logic Corporation Flip-chip integrated circuit routing to I/O devices
US6472903B1 (en) * 1999-01-08 2002-10-29 Altera Corporation Programmable logic device input/output architecture with power bus segmentation for multiple I/O standards
US6218858B1 (en) * 1999-01-27 2001-04-17 Xilinx, Inc. Programmable input/output circuit for FPGA for use in TTL, GTL, GTLP, LVPECL and LVDS circuits
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US6535043B2 (en) * 2000-05-26 2003-03-18 Lattice Semiconductor Corp Clock signal selection system, method of generating a clock signal and programmable clock manager including same
JP3670563B2 (en) * 2000-09-18 2005-07-13 株式会社東芝 Semiconductor device
JP4201128B2 (en) * 2003-07-15 2008-12-24 株式会社ルネサステクノロジ Semiconductor integrated circuit device
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US7102417B2 (en) * 2004-11-05 2006-09-05 International Business Machines Corporation Integrated circuit die including a temperature detection circuit, and system and methods for calibrating the temperature detection circuit
TWI271030B (en) * 2004-11-16 2007-01-11 Feature Integration Technology Input/output adjustment circuit capable of adjusting output impedance

Patent Citations (2)

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Publication number Priority date Publication date Assignee Title
US20030146774A1 (en) * 2002-02-07 2003-08-07 International Business Machines Corporation ASIC architechture for active-compensation of a programmable impedance I/O
US20060253825A1 (en) * 2005-05-09 2006-11-09 Lsi Logic Corporation Relocatable mixed-signal functions

Also Published As

Publication number Publication date
CN101617314B (en) 2013-01-02
TWI472157B (en) 2015-02-01
TW200845583A (en) 2008-11-16
WO2008097932A2 (en) 2008-08-14
US8072240B2 (en) 2011-12-06
CN101617314A (en) 2009-12-30
JP2010518630A (en) 2010-05-27
US7642809B2 (en) 2010-01-05
JP2014017817A (en) 2014-01-30
US20100073026A1 (en) 2010-03-25
US20080186053A1 (en) 2008-08-07

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