WO2009125323A1 - Power amplifying unit and method for controlling a power amplifier unit - Google Patents

Power amplifying unit and method for controlling a power amplifier unit Download PDF

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Publication number
WO2009125323A1
WO2009125323A1 PCT/IB2009/051396 IB2009051396W WO2009125323A1 WO 2009125323 A1 WO2009125323 A1 WO 2009125323A1 IB 2009051396 W IB2009051396 W IB 2009051396W WO 2009125323 A1 WO2009125323 A1 WO 2009125323A1
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Prior art keywords
unit
power amplifier
look
predistorter
power
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PCT/IB2009/051396
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French (fr)
Inventor
Yilong Shen
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Nxp B.V.
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Publication of WO2009125323A1 publication Critical patent/WO2009125323A1/en

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Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3241Modifications of amplifiers to reduce non-linear distortion using predistortion circuits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3241Modifications of amplifiers to reduce non-linear distortion using predistortion circuits
    • H03F1/3247Modifications of amplifiers to reduce non-linear distortion using predistortion circuits using feedback acting on predistortion circuits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3241Modifications of amplifiers to reduce non-linear distortion using predistortion circuits
    • H03F1/3258Modifications of amplifiers to reduce non-linear distortion using predistortion circuits based on polynomial terms
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/24Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/32Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
    • H04L27/34Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
    • H04L27/36Modulator circuits; Transmitter circuits
    • H04L27/366Arrangements for compensating undesirable properties of the transmission path between the modulator and the demodulator
    • H04L27/367Arrangements for compensating undesirable properties of the transmission path between the modulator and the demodulator using predistortion
    • H04L27/368Arrangements for compensating undesirable properties of the transmission path between the modulator and the demodulator using predistortion adaptive predistortion
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2201/00Indexing scheme relating to details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements covered by H03F1/00
    • H03F2201/32Indexing scheme relating to modifications of amplifiers to reduce non-linear distortion
    • H03F2201/3224Predistortion being done for compensating memory effects
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2201/00Indexing scheme relating to details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements covered by H03F1/00
    • H03F2201/32Indexing scheme relating to modifications of amplifiers to reduce non-linear distortion
    • H03F2201/3233Adaptive predistortion using lookup table, e.g. memory, RAM, ROM, LUT, to generate the predistortion

Definitions

  • the present invention relates to a power amplifying unit and a method for controlling a power amplifier unit.
  • Highly linear power amplifiers PA are typically used in modern wireless communication systems. To be able to provide a power amplifier with a high linearity, the power efficiency of the power amplifier is often reduced. Therefore, a predistorter is coupled to the input of the power amplifier such that the high efficiency of the power amplifier is not reduced. The predistorter is therefore used to enable a linearized output of the power amplifier while ensuring a high power efficiency.
  • Fig. 1 shows a basic representation of a block diagram of a power amplifying unit according to the prior art.
  • the power amplifying unit comprises a predistorter PD and a power amplifier PA in series, wherein x(t) is the input and y(t) is the output of the predistorter PD.
  • the output y(f) of the predistorter PD is the input of the power amplifier and z(t) is the output of the power amplifier.
  • z(t) will be a replica of x(t) to scale. As a result, z(t) is not nonlinearly distorted compared to x(t) .
  • Fig. 2 shows a block diagram of a power amplifier unit according to the prior art.
  • the predistorter PD is implemented as a one dimensional look-up table with a first and second look-up table LUTl, LUT2.
  • Equa. (4) for every input x(t) below a certain power threshold, another signal y(f) is present such that where C is a constant coefficient and constitutes the wanted linear gain. Accordingly, Equa. (5) can be rewritten as a map from X to y based on which the f PD of f pA (4) is obtained,
  • the map M can be implemented.
  • the lookup table is used to store sampled values of y .
  • the values of y correspond to the different indices of X If sufficient y samples are stored in the look-up table, i.e. if the density of the stored y samples is high enough, the mapping based on the look-up table will be closed to the map M .
  • the look-up table according to Fig. 2 is a one dimensional ID look-up table as merely one index is required to extract the information from the look-up table.
  • a further alternative predistorter can be a predistorter with a look-up table and the above described polynomial predistortion.
  • the predistorter PD will compare the output of the power amplifier with the scaled input signal in real-time so that the information about function f PA are obtained indirectly. Based on the comparison results, the look-up table or the polynomial parameters of the predistorter PD can be adapted to obtain an optimal adoption of the output of the power amplifier with the scaled input signal.
  • Fig. 3 shows a block diagram of a further power amplifier according to the prior art.
  • the power amplifying unit comprises a predistorter having an adaptive look-up table unit 100 and a gain unit 150.
  • the power amplifying unit furthermore comprises a power amplifier.
  • a first aspect of the invention relates to a power amplifying unit comprising a power amplifier and a predistorter.
  • the predistorter comprises at least one lookup table unit and a transformation unit for generating indexes for the at least one look-up table unit from a delay output signal of the predistorter and from an input signal of the power amplifying unit.
  • the output of the transformation unit corresponds to the indexes of the at least one look-up table unit.
  • the transformation unit is implemented as an index generation unit for generating at least three indexes for the at least one look-up table unit based on the input signal and the output signal.
  • the power amplifier unit may comprise a gain unit, which receives an output signal of the power amplifier as input signal.
  • the output signal of the gain unit is subtracted from the input signal, and the result of the substraction is forwarded to the at least one lookup table unit.
  • a further embodiment of the invention relates to a wireless communication device with a power amplifier unit as described above.
  • a second aspect of the invention relates to a method for controlling a power amplifying unit having a power amplifier and a predistorter which comprises at least one look-up table unit. Indexes for the at least one look-up table unit are generated from a delayed or filtered output signal of the predistorter, and from an input signal of the power amplifying unit.
  • the invention relates to the idea that a one dimensional look-up table predistorter will not work very well if the power amplifier f PA has a dynamic behavior due to the fact that typically a static f PA is the basis of the operation of the one dimensional look-up table predistorter.
  • a polynomial distorter will be more useful for a dynamic behavior of the function f PA .
  • a polynomial predistorter is very costly and difficult to implement in real time systems.
  • the simplicity of a look-up table predistorter is maintained while also a good performance for dynamic functions f PA is achieved.
  • Fig. 1 shows a basic representation of a block diagram of a power amplifying unit according to the prior art
  • Fig. 2 shows a block diagram of a power amplifier unit according to the prior art
  • Fig. 3 shows a block diagram of a further power amplifier according to the prior art
  • Fig. 4 shows a schematic block diagram of a power amplifier unit according to a first embodiment of the invention
  • Fig. 5 shows signal phasors indexed with the first index set for a power amplifier according to a second embodiment of the invention
  • Fig. 6 shows a block diagram of a power amplifier unit according to the second embodiment of the invention
  • Fig. 7 shows the geometrical relation between the first index set and a second index set.
  • Figs. 8a and 8b show a representation of a data structure and a data entry index according to a third embodiment of the invention.
  • Fig. 9 shows a representation of a three dimensional look-up table operation according to the third embodiment of the invention.
  • Fig. 10 shows a representation of a power amplifier unit according to the third embodiment of the invention
  • Fig. 11a shows a block diagram of a power amplifier unit according to the prior art
  • Fig. 1 Ib shows a block diagram of a power amplifier unit according to an embodiment of the invention.
  • Fig. 4 shows a block diagram of a power amplifier according to the invention.
  • the power amplifier PA receives an input signal x( ⁇ ) and outputs an output signal z(t) .
  • Equa. (10) describes a model of the power amplifier which is broader than the model described in Equa. (4).
  • the model described in Equa. (10) can therefore be used to design an appropriate predistorter.
  • normally has a length less than, according to the nyquist sampling principle, half of the inverse of the bandwidth of the input signal x( ⁇ ) .
  • x(t — At) is denoted as x(t — X) for the sake of clarity. Accordingly, with
  • Equa. (10) can be further written as
  • , ⁇ ) : / i ; 1 (c
  • x2 ⁇ -) (13) from which f pD can be obtained f PD ( ⁇ (t), ⁇ (t - 1)) : M
  • Fig. 6 shows a basic block diagram of a power amplifier unit according to a second embodiment .
  • the power amplifier unit comprises a power amplifier PA and a predistorter 200.
  • the predistorter 200 is implemented as a three-dimensional look-up table predistorter.
  • the predistorter 200 receives the input signal x ⁇ t) and outputs the output signal y(t) .
  • the predistorter 200 comprises a delay unit DU, a first and second look-up table unit LUTl, LUT2 and an index generating unit IG.
  • LUTl, LUT2 In the look-up tables LUTl, LUT2, y values can be stored, wherein each y value has three indexes x ⁇ , x2 and ⁇ , which will correspond to Equa.
  • the point x(t — X) represents the actual power amplifier input at the time point t — At while x(t) represents the input of the predistorter at the time point t . Accordingly, in Fig. 6, the At delay value of y(t) corresponds to x(t — 1) . Due to the fact that each y value has three indexes, the predistorter according to the second embodiment is considered as a three dimensional predistorter.
  • a 1113x + R corresponds to the maximum input signal amplitude and R to the maximum trajectory length from x(t - Y) to x(0 for all possible values of t .
  • Figs. 8a and 8b are meant for illustration of the data structure and data entry index of datas of the look-up tables according to the third embodiment which employs the new index set.
  • the data structure of the look-up tables according to the third embodiment may be arranged to clusters of dots. The dots may be aligned on co-centric cycles on the positive real axis of the polar form representation.
  • each dot corresponds to one data entry in the look-up table.
  • Each cluster may be considered as a sub look-up table with two dimensions.
  • FIG. 8b depicts one of these clusters to indicate that the entry can be indexed by X , r, ⁇ .
  • FIG.9 shows a representation of a look-up table operation according to a third embodiment. In particular, the reaction of the look-up table for a point P with arbitrary indexes is depicted. Assuming: Y 1 ⁇ Y( ⁇ ) ⁇ Y U (18)
  • step I the 3D look-up table LUT locates two adjacent data clusters centering at X 1 and X u , respectively, and finds two points P L and Pu from them.
  • P 1 has indexes (X ⁇ r(0, ⁇ (0) and P
  • two interim look-up table LUT outputs corresponding to point P 1 and P u , can be obtained using a 2D interpolation.
  • the interim output pertaining to point P 1 are, in turn, obtained from the entries Pl , P2, P3 and P4, whose indexes are ( X 1 , Y 1 , ⁇ 1 ), ( X 1 , Y u , ⁇ 1 ), ( X 1 , Y n , ⁇ M ) and ( X 1 , Y 1 , ⁇ M ), while the interim output pertaining to point Pu obtained from the entries P5, P6, P7 and P8, whose indexes are (X u ,Y 1 , ⁇ 1 ),(X u ,Y u , ⁇ 1 ),
  • step III the 3D look-up table LUT generates the eventual output of point P through one dimensional interpolation , using the two interim outputs at points Pi and P u .
  • the formal output Y(t) under arbitrary index ( ⁇ x(t) L ⁇ (t), ⁇ (t) ) is as follows:
  • Y(t) wl*Y pl +w2*Y p2 +w3*Y p3 +w4*Y p4
  • W x (x(0-x,)/(x a -x,)
  • w r (r(0-r,)/(r k -r,)
  • w ⁇ ( ⁇ (0- ⁇ ,)/( ⁇ M - ⁇ ,)
  • Fig.10 shows a block diagram of a power amplifier unit according to the third embodiment.
  • the power amplifier unit comprises a power amplifier PA and a predistorter 300.
  • the predistorter 300 is implemented as an adaptive three dimensional look-up table predistorter.
  • the predistorter 300 comprises a delay unit DU, a transformation unit TU and a look-up table unit 320 with two look-up table units LUTl, LUT2.
  • the predistorter 300 may furthermore comprise a gain unit 350.
  • the transformation unit TU transforms from x(t) and x(t- ⁇ ) to x(t),r(t)Mt).
  • a power amplifier unit according to an embodiment of the present invention is depicted.
  • the difference between the power amplifier unit according to the prior art and according to the embodiment is the provision of a delay unit DU.
  • the delay unit receives the output of the predistorter y(t) and the output of the delay unit y(t - Y) serves as input to the predistorter PD.
  • f PA in Equa. (9) is a linear dynamic function and if the functionality of the predistorter remains unchanged, z(t) corresponds to cx(t) , then f PA can be considered as the input-output mapping of an FIR filter.
  • the inverse of the FIR filter is a HR filter.
  • the IIR filter can be implemented with a feedback mechanism. Although the function f PA is actually not linear in relevant cases, a feedback mechanism should remain in order to efficiently implement the reverse of f PA .
  • a FIR structure can only approach the performance of an IIR structure with larger tap number. Accordingly, practical polynomial predistorter typically have dozens of parameters due to the lack of a feedback mechanism.
  • One important variation of this invention is that the delay unit of fig.10 is replaced by a general FIR structure. With such a replacement, an efficient predistortion may be possible even for an PA whose transfer function are not covered by (10).
  • the above described predistortion is based on the usage of a look-up table which is indexed by three quantities, wherein part of the indexes are known from the output of the predistorter.

Abstract

A power amplifying unit with a power amplifier (PA) and a predistorter (PD) is provided. The predistorter ((200) comprises at least one look-up table unit (LUT1, LUT2) and a transformation unit ((IG) for generating indexes for the at least one look-up table unit (LUT1, LUT2) from a delay output signal (y(t)) of the predistorter, ( 200) and from an input signal (x(t) ) of the power amplifying unit. The output of the transformation unit (IG) corresponds to the indexes of the at least one look-up table unit (LUT1, LUT2).

Description

Power amplifying unit and method for controlling a power amplifier unit
FIELD OF THE INVENTION
The present invention relates to a power amplifying unit and a method for controlling a power amplifier unit.
BACKGROUND OF THE INVENTION
Highly linear power amplifiers PA are typically used in modern wireless communication systems. To be able to provide a power amplifier with a high linearity, the power efficiency of the power amplifier is often reduced. Therefore, a predistorter is coupled to the input of the power amplifier such that the high efficiency of the power amplifier is not reduced. The predistorter is therefore used to enable a linearized output of the power amplifier while ensuring a high power efficiency.
Fig. 1 shows a basic representation of a block diagram of a power amplifying unit according to the prior art. The power amplifying unit comprises a predistorter PD and a power amplifier PA in series, wherein x(t) is the input and y(t) is the output of the predistorter PD. The output y(f) of the predistorter PD is the input of the power amplifier and z(t) is the output of the power amplifier.
If y(t) = fPD «t)) (i)
Φ) = fPA (J(O) (2) then the input-output function of the power amplifier unit is z(t) = fPA <JPD (x(t))) (3)
If fPD is an inverse function of fPA to scale, z(t) will be a replica of x(t) to scale. As a result, z(t) is not nonlinearly distorted compared to x(t) .
Fig. 2 shows a block diagram of a power amplifier unit according to the prior art. Here, the predistorter PD is implemented as a one dimensional look-up table with a first and second look-up table LUTl, LUT2.
A look-up table predistorter assumes that fPA is a static function, fPA takes the following form
Figure imgf000003_0001
According to Equa. (4), for every input x(t) below a certain power threshold, another signal y(f) is present such that
Figure imgf000003_0002
where C is a constant coefficient and constitutes the wanted linear gain. Accordingly, Equa. (5) can be rewritten as a map from X to y
Figure imgf000003_0003
based on which the fPD of fpA (4) is obtained,
Figure imgf000003_0004
If a circuit/sub-system with a transfer function according to Equa. (7) is placed before the power amplifier PA, then the output will not be nonlinearly distorted, as shown in (8). z(t) = fPA (fPD (x(t)))
Figure imgf000003_0005
jZx(t)
- c X (0|<
= CX(t)
By means of a look-up table, the map M can be implemented. The lookup table is used to store sampled values of y . The values of y correspond to the different indices of X If sufficient y samples are stored in the look-up table, i.e. if the density of the stored y samples is high enough, the mapping based on the look-up table will be closed to the map M . The look-up table according to Fig. 2 is a one dimensional ID look-up table as merely one index is required to extract the information from the look-up table.
The predistorter as depicted in Fig. 1 can also be implemented as a polynomial predistorter. Accordingly, a polynomial predistorter assumes that fPA is a dynamic function: z{t) = fPA(x(t),x(t - At),...,x(t - nAt)) (9) Hence, Equa. (9) and its inverse function fPD can be expressed as parametric polynomials of x(t) , x(t — At) , ... , x(t — TlAt) . The function fPD of a polynomial predistorter is implemented as a parametric polynomial.
A further alternative predistorter can be a predistorter with a look-up table and the above described polynomial predistortion.
It should be noted that it is rarely the case that the predistorter knows the function fPA . Typically, the predistorter PD will compare the output of the power amplifier with the scaled input signal in real-time so that the information about function fPA are obtained indirectly. Based on the comparison results, the look-up table or the polynomial parameters of the predistorter PD can be adapted to obtain an optimal adoption of the output of the power amplifier with the scaled input signal.
Fig. 3 shows a block diagram of a further power amplifier according to the prior art. The power amplifying unit comprises a predistorter having an adaptive look-up table unit 100 and a gain unit 150. The power amplifying unit furthermore comprises a power amplifier.
SUMMARY OF THE INVENTION
It is an aim of the invention to provide a power amplifier unit with an improved linearized performance and with a good power efficiency, and this aim is addressed by a power amplifier unit according to claim 1 and a method for controlling a power amplifier unit according to claim 5.
Therefore, a first aspect of the invention relates to a power amplifying unit comprising a power amplifier and a predistorter. The predistorter comprises at least one lookup table unit and a transformation unit for generating indexes for the at least one look-up table unit from a delay output signal of the predistorter and from an input signal of the power amplifying unit. The output of the transformation unit corresponds to the indexes of the at least one look-up table unit.
According to an embodiment of the invention, the transformation unit is implemented as an index generation unit for generating at least three indexes for the at least one look-up table unit based on the input signal and the output signal.
The power amplifier unit may comprise a gain unit, which receives an output signal of the power amplifier as input signal. The output signal of the gain unit is subtracted from the input signal, and the result of the substraction is forwarded to the at least one lookup table unit.
A further embodiment of the invention relates to a wireless communication device with a power amplifier unit as described above. A second aspect of the invention relates to a method for controlling a power amplifying unit having a power amplifier and a predistorter which comprises at least one look-up table unit. Indexes for the at least one look-up table unit are generated from a delayed or filtered output signal of the predistorter, and from an input signal of the power amplifying unit. The invention relates to the idea that a one dimensional look-up table predistorter will not work very well if the power amplifier fPA has a dynamic behavior due to the fact that typically a static fPA is the basis of the operation of the one dimensional look-up table predistorter. On the other hand, a polynomial distorter will be more useful for a dynamic behavior of the function fPA . However, such a polynomial predistorter is very costly and difficult to implement in real time systems. With the power amplifier unit according to the invention, the simplicity of a look-up table predistorter is maintained while also a good performance for dynamic functions fPA is achieved.
Further aspects of the invention are defined in the dependent claims.
BRIEF DESCRIPTION OF THE DRAWINGS
The advantages and embodiments of the invention will now be described in more detail with reference to the Figures.
Fig. 1 shows a basic representation of a block diagram of a power amplifying unit according to the prior art, Fig. 2 shows a block diagram of a power amplifier unit according to the prior art,
Fig. 3 shows a block diagram of a further power amplifier according to the prior art,
Fig. 4 shows a schematic block diagram of a power amplifier unit according to a first embodiment of the invention,
Fig. 5 shows signal phasors indexed with the first index set for a power amplifier according to a second embodiment of the invention, Fig. 6 shows a block diagram of a power amplifier unit according to the second embodiment of the invention,
Fig. 7 shows the geometrical relation between the first index set and a second index set. Figs. 8a and 8b show a representation of a data structure and a data entry index according to a third embodiment of the invention,
Fig. 9 shows a representation of a three dimensional look-up table operation according to the third embodiment of the invention,
Fig. 10 shows a representation of a power amplifier unit according to the third embodiment of the invention,
Fig. 11a shows a block diagram of a power amplifier unit according to the prior art, and
Fig. 1 Ib shows a block diagram of a power amplifier unit according to an embodiment of the invention.
DETAILED DESCRIPTION OF EMBODIMENTS
Fig. 4 shows a block diagram of a power amplifier according to the invention. The power amplifier PA receives an input signal x(ϊ) and outputs an output signal z(t) . The function fPA of the power amplifier can be described as follows: z(t) = fpA (x(t), x(t - At)) (10)
It should be noted that the function according to Equa. (10) describes a model of the power amplifier which is broader than the model described in Equa. (4). The model described in Equa. (10) can therefore be used to design an appropriate predistorter. Δ^ normally has a length less than, according to the nyquist sampling principle, half of the inverse of the bandwidth of the input signal x(ϊ) .
In the following equations, x(t — At) is denoted as x(t — X) for the sake of clarity. Accordingly, with
Figure imgf000006_0001
Equa. (10) can be further written as
Figure imgf000006_0002
where φ(f) = Zx(t - 1) - Zx(t) . x(t) , x(t — 1) β are depicted as phasors in Fig.5 and φ(0 corresponds to the angle between these phasors. Equa. (11) indicates that for a given x(t) a y(t) is present (under a certain power threshold) that χ(t)\ = f(y(t),χ(t - i)e-jZx(t))
(12) = /«CK0,|*(' - i)|eMO)
Equa. (13) is equivalent to Equa. (12), and defines explicitly a map from xl x2 , and φ to y , i.e. j; = Mμi| μ2| φ (|xl|,|x2|,φ) := /i;1(c|4|x2μ-) (13) from which fpD can be obtained fPD(χ(t),χ(t - 1)) := M|X1| |x2| φ d*(o|,|*(f - i)|,φ(0)^(': (14)
When the function /^0 is put before fpA of Equa. (10),
*(0 = LΛ (Ln WO, ^ - 1)), χ(t - 1))
Figure imgf000007_0001
X (0|, x(t -
= LΛLKc X (0|, x(t -
Figure imgf000007_0002
Figure imgf000007_0003
= cx(0
Fig. 6 shows a basic block diagram of a power amplifier unit according to a second embodiment . The power amplifier unit comprises a power amplifier PA and a predistorter 200. The predistorter 200 is implemented as a three-dimensional look-up table predistorter. The predistorter 200 receives the input signal x{t) and outputs the output signal y(t) . The predistorter 200 comprises a delay unit DU, a first and second look-up table unit LUTl, LUT2 and an index generating unit IG. In the look-up tables LUTl, LUT2, y values can be stored, wherein each y value has three indexes x\ , x2 and φ , which will correspond to Equa. (13). Provided that the density of the stored y samples is high enough, the mapping of the look-up table will converge to the map M ^ , 2 . The point x(t — X) represents the actual power amplifier input at the time point t — At while x(t) represents the input of the predistorter at the time point t . Accordingly, in Fig. 6, the At delay value of y(t) corresponds to x(t — 1) . Due to the fact that each y value has three indexes, the predistorter according to the second embodiment is considered as a three dimensional predistorter.
The three indexes of each y value in the look-up table x\ , x2 , φ may be transformed to x\ , r ,ψ , as illustrated in Fig.7. r and φ are described in Equa. (15) and
(16): r = x\ - x2
(15)
= -y|xl| + x2 - 2|xl|x2| cosφ x 2
(16) sinφ sinφ the range of the new indexes are shown in (17). As will become clear from the following explanation, it is easier to handle the new indexes in terms of practical DPD implementation. o < |*i| < A_
0 < r < R (17)
0 < φ ≤ 2π
A1113x + R corresponds to the maximum input signal amplitude and R to the maximum trajectory length from x(t - Y) to x(0 for all possible values of t . Figs. 8a and 8b are meant for illustration of the data structure and data entry index of datas of the look-up tables according to the third embodiment which employs the new index set. Specifically, the data structure of the look-up tables according to the third embodiment may be arranged to clusters of dots. The dots may be aligned on co-centric cycles on the positive real axis of the polar form representation. In Fig. 8a, each dot corresponds to one data entry in the look-up table. Each cluster may be considered as a sub look-up table with two dimensions. Fig. 8b depicts one of these clusters to indicate that the entry can be indexed by X , r,φ . Fig.9 shows a representation of a look-up table operation according to a third embodiment. In particular, the reaction of the look-up table for a point P with arbitrary indexes
Figure imgf000009_0001
is depicted. Assuming:
Figure imgf000009_0002
Y1 <Y(Ϊ) <YU (18)
Φ, ≤Φ(O≤ΦB wherein Xu -X1 (X = X , Y or ψ ) is the smallest index step, the reaction may be described as follows:
In step I, the 3D look-up table LUT locates two adjacent data clusters centering at X1 and Xu , respectively, and finds two points PL and Pu from them. P1 has indexes (Xπr(0,φ(0) and P
Figure imgf000009_0003
In step II, two interim look-up table LUT outputs, corresponding to point P1 and Pu , can be obtained using a 2D interpolation. The interim output pertaining to point P1 are, in turn, obtained from the entries Pl , P2, P3 and P4, whose indexes are ( X1 , Y1 , ^1 ), ( X1 , Yu , ^1 ), ( X1 , Yn , φM ) and ( X1 , Y1 , φM ), while the interim output pertaining to point Pu obtained from the entries P5, P6, P7 and P8, whose indexes are (Xu,Y11),(Xu,Yu, ^1 ),
(*M>^Φjand(*M^Φj-
In step III, the 3D look-up table LUT generates the eventual output of point P through one dimensional interpolation , using the two interim outputs at points Pi and Pu. The formal output Y(t) under arbitrary index ( \x(t) L γ(t),§(t) ) is as follows:
Y(t) = wl*Ypl+w2*Yp2+w3*Yp3+w4*Yp4
(19)
+ w5*7 -p5.+w6*7 P<6;+w7*7 p,i+w8*7 "PS where Wl = (l -wj(l- w)(l -wφ) w2 = (l-wx)wr(l-wφ) w3 = (1- wx)wrwφ w4 = (1- Wx)(I -w)w
(20) w5 = wx(l-wr)(l-wφ) w6 = w w (1 - wA ) w7 = w x w r w φ, w8 = Wx(I- wr)wφ
Wx = (x(0-x,)/(xa-x,) wr =(r(0-r,)/(rk -r,) wφ=(φ(0-φ,)/(φM-φ,) Yp1 (i = 1, 2, ...., 8) corresponds to the stored entry value of the look-up tables
LUT lor LUT2 at the point Pi.
Fig.10 shows a block diagram of a power amplifier unit according to the third embodiment. The power amplifier unit comprises a power amplifier PA and a predistorter 300. The predistorter 300 is implemented as an adaptive three dimensional look-up table predistorter. The predistorter 300 comprises a delay unit DU, a transformation unit TU and a look-up table unit 320 with two look-up table units LUTl, LUT2. The predistorter 300 may furthermore comprise a gain unit 350. The transformation unit TU transforms from x(t) and x(t-\) to x(t),r(t)Mt).
The LMS adaptive formulas are given by (21)
Ym(t) = Y (t-l) + μ*wi*ε(t) . Λ . _ pι pι O=l,2,...,8) (21) ε(t) = z(t)/c-x(t) wherein μ corresponds to the adaptive speed and wi (i = 1 , 2, ...., 8) is defined in Equa.
(20).
In the following, a comparison of the power amplifier unit according to the present invention with respect to the power amplifier unit according to the prior art is described. In Fig.1 Ia, a power amplifier unit according to the prior art is depicted. In Fig.
1 Ib, a power amplifier unit according to an embodiment of the present invention is depicted. The difference between the power amplifier unit according to the prior art and according to the embodiment is the provision of a delay unit DU. The delay unit receives the output of the predistorter y(t) and the output of the delay unit y(t - Y) serves as input to the predistorter PD. If the function fPA in Equa. (9) is a linear dynamic function and if the functionality of the predistorter remains unchanged, z(t) corresponds to cx(t) , then fPA can be considered as the input-output mapping of an FIR filter. The inverse of the FIR filter is a HR filter. The IIR filter can be implemented with a feedback mechanism. Although the function fPA is actually not linear in relevant cases, a feedback mechanism should remain in order to efficiently implement the reverse of fPA . A FIR structure can only approach the performance of an IIR structure with larger tap number. Accordingly, practical polynomial predistorter typically have dozens of parameters due to the lack of a feedback mechanism. One important variation of this invention is that the delay unit of fig.10 is replaced by a general FIR structure. With such a replacement, an efficient predistortion may be possible even for an PA whose transfer function are not covered by (10).
The above described predistortion is based on the usage of a look-up table which is indexed by three quantities, wherein part of the indexes are known from the output of the predistorter.
It should be noted that the above-mentioned embodiments illustrate rather than limit the invention, and that those skilled in the art will be able to design many alternative embodiments without departing from the scope of the appended claims. In the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. The word "comprising" does not exclude the presence of elements or steps other than those listed in a claim. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. In the device claim enumerating several means, several of these means can be embodied by one and the same item of hardware. The mere fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage.
Furthermore, any reference signs in the claims shall not be constrained as limiting the scope of the claims.

Claims

CLAIMS:
1. Power amplifier unit, comprising: a power amplifier, and a predistorter having at least one look-up table unit and a transformation unit for generating indexes for the at least one look-up table unit from a delayed output signal of the predistorter and from an input signal of the power amplifying unit, wherein the output of the transformation unit corresponds to the indexes of the at least one look-up table unit.
2. Power amplifier unit according to claim 1, wherein the transformation unit is implemented as an index generation unit for generating at least three indexes for the look-up table unit based on the input signal and the output signal.
3. Power amplifier unit according to claim 1 or 2, further comprising: a gain unit which receives an output signal of the power amplifier as input signal, wherein the output signal of the gain unit is subtracted from the input signal and the result of the subtraction is forwarded to the at least one look-up table unit.
4. Wireless communication device, comprising at least one power amplifier unit according to anyone of the claims 1 to 3.
5. Method for controlling a power amplifier unit having a power amplifier and a predistorter, which comprises at least one look-up table unit, comprising the steps of generating indexes for the at least one look-up table unit from a delayed output signal of the predistorter and from an input signal of the power amplifier unit.
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