WO2010019883A3 - System, method, and computer readable medium for designing a scalable clustered storage integrated circuit for multi-media processing - Google Patents

System, method, and computer readable medium for designing a scalable clustered storage integrated circuit for multi-media processing Download PDF

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Publication number
WO2010019883A3
WO2010019883A3 PCT/US2009/053887 US2009053887W WO2010019883A3 WO 2010019883 A3 WO2010019883 A3 WO 2010019883A3 US 2009053887 W US2009053887 W US 2009053887W WO 2010019883 A3 WO2010019883 A3 WO 2010019883A3
Authority
WO
WIPO (PCT)
Prior art keywords
integrated circuit
memory
designing
computer readable
readable medium
Prior art date
Application number
PCT/US2009/053887
Other languages
French (fr)
Other versions
WO2010019883A2 (en
Inventor
Hsueh Ban Lan
Original Assignee
Omnivision Technologies, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Omnivision Technologies, Inc. filed Critical Omnivision Technologies, Inc.
Priority to CN2009801408250A priority Critical patent/CN102187669A/en
Priority to EP09807363.8A priority patent/EP2329420A4/en
Publication of WO2010019883A2 publication Critical patent/WO2010019883A2/en
Publication of WO2010019883A3 publication Critical patent/WO2010019883A3/en

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G06F13/1652—Handling requests for interconnection or transfer for access to memory bus based on arbitration in a multiprocessor architecture
    • G06F13/1663—Access to shared memory

Abstract

An integrated circuit includes a clustered memory storage subsystem. The integrated circuit utilizes a baseline design that supports a scalable number of memory clusters. The number of storage devices within an individual memory cluster may also be selected to adjust the memory capacity. A single baseline design of a clustered memory storage subsystem design is customized for a particular integrated circuit with the number of memory clusters and storage devices within memory clusters selected for the memory requirements of a particular application. The design and verification costs to fabricate different versions of the integrated circuit are thus reduced.
PCT/US2009/053887 2008-08-14 2009-08-14 System, method, and computer readable medium for designing a scalable clustered storage integrated circuit for multi-media processing WO2010019883A2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CN2009801408250A CN102187669A (en) 2008-08-14 2009-08-14 System, method, and computer readable medium for designing a scalable clustered storage integrated circuit for multi-media processing
EP09807363.8A EP2329420A4 (en) 2008-08-14 2009-08-14 System, method, and computer readable medium for designing a scalable clustered storage integrated circuit for multi-media processing

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US12/191,926 2008-08-14
US12/191,926 US8122421B2 (en) 2008-08-14 2008-08-14 System, and method, and computer readable medium for designing a scalable clustered storage integrated circuit for multi-media processing

Publications (2)

Publication Number Publication Date
WO2010019883A2 WO2010019883A2 (en) 2010-02-18
WO2010019883A3 true WO2010019883A3 (en) 2010-05-14

Family

ID=41669718

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2009/053887 WO2010019883A2 (en) 2008-08-14 2009-08-14 System, method, and computer readable medium for designing a scalable clustered storage integrated circuit for multi-media processing

Country Status (4)

Country Link
US (1) US8122421B2 (en)
EP (1) EP2329420A4 (en)
CN (1) CN102187669A (en)
WO (1) WO2010019883A2 (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8589851B2 (en) * 2009-12-15 2013-11-19 Memoir Systems, Inc. Intelligent memory system compiler
CN102882955A (en) * 2012-09-18 2013-01-16 浪潮(北京)电子信息产业有限公司 Extension method and device for cluster storage system
WO2018227111A1 (en) 2017-06-09 2018-12-13 Nanosemi, Inc. Crest factor reduction
WO2019094713A1 (en) 2017-11-13 2019-05-16 Nanosemi, Inc. Spectrum shaping crest factor reduction
US10826739B1 (en) * 2019-08-01 2020-11-03 Nanosemi, Inc. Systems and methods for efficient clipping in crest factor reduction processes
CN116319967B (en) * 2023-05-18 2023-07-25 深圳锐爱电子有限公司 Data storage expansion method, device and equipment based on Internet of things and storage medium

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US20070245063A1 (en) * 2004-04-14 2007-10-18 Kazuhisa Fujimoto Storage system
US20070297397A1 (en) * 2006-06-23 2007-12-27 Coteus Paul W Memory Systems for Automated Computing Machinery

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US6263409B1 (en) * 1998-12-22 2001-07-17 Unisys Corporation Data processing system and method for substituting one type of request for another for increased performance when processing back-to-back requests of certain types
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Publication number Priority date Publication date Assignee Title
US6006296A (en) * 1997-05-16 1999-12-21 Unisys Corporation Scalable memory controller
US20050044304A1 (en) * 2003-08-20 2005-02-24 Ralph James Method and system for capturing and bypassing memory transactions in a hub-based memory system
US20070245063A1 (en) * 2004-04-14 2007-10-18 Kazuhisa Fujimoto Storage system
US20070297397A1 (en) * 2006-06-23 2007-12-27 Coteus Paul W Memory Systems for Automated Computing Machinery

Non-Patent Citations (1)

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Title
See also references of EP2329420A4 *

Also Published As

Publication number Publication date
CN102187669A (en) 2011-09-14
WO2010019883A2 (en) 2010-02-18
EP2329420A2 (en) 2011-06-08
US20100042956A1 (en) 2010-02-18
US8122421B2 (en) 2012-02-21
EP2329420A4 (en) 2013-04-17

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