WO2012049304A1

WO2012049304A1 - Method for fabricating a free-standing group iii nitride substrate

Info

Publication number: WO2012049304A1
Application number: PCT/EP2011/068015
Authority: WO
Inventors: Bernd Meyer; Vladimir Nikolaev
Original assignee: Kewar Holdings S.A.
Priority date: 2010-10-14
Filing date: 2011-10-14
Publication date: 2012-04-19
Also published as: RU2576435C2; EP2627804A1; RU2013122756A

Abstract

A method for fabricating a free-standing group III nitride substrate (100) comprises the steps of depositing a first group III nitride layer (102) on a growth substrate (101); forming a mechanically weakened sacrificial layer (110); depositing a second group III nitride layer (107) on the first group III nitride layer (102); and separating the second group III nitride layer (107) from the growth substrate (101) along the sacrificial layer (110). According to the present invention, the step of forming a mechanically weakened sacrificial layer (110) comprises forming openings (105) extending from the free surface of the first group III nitride layer (102) to the interfacial region (109) between the first group III nitride layer (102) and the growth substrate (101); and etching laterally, via the openings (105), the first group III nitride layer (102) in said interfacial region (109).

Description

ME THOD FOR FABRICATING A FREE -STANDING GROUP I I I NI TRIDE SUBSTRATE

FIELD OF THE INVENTION

The present invention relates, in general, to methods for fabricating free-standing Ill-nitride substrates. The present invention is focused on a method for fab^¬ ricating a free-standing Ill-nitride substrate, the method comprising depositing Ill-nitride on a growth substrate and separating the so formed nitride crystal from the foreign substrate.

BACKGROUND OF THE INVENTION

Due to the many advantageous properties thereof, ni^¬ trides of group III metals, i.e. the so called III- nitrides, form an important group of semiconductor ma^¬ terials for electronic and optoelectronic applica^¬ tions. As one example, Gallium Nitride (GaN) in its many variations has become one of the most important semiconductor materials for optoelectronic devices such as high brightness Light Emitting Diodes (LEDs) for lighting applications.

Nitride-based devices are typically grown epitaxially as layered structures on substrates. As well-known in the art, in order to avoid many undesired effects e.g. due to the different lattice constants and thermal ex^¬ pansion coefficients between the substrate and the de^¬ vice layers grown on it, a substrate should most pref^¬ erably be formed of the same material as the device layers. However, unavailability of high quality, preferably stand-alone Ill-nitride templates is a well-known problem in this field, having compelled the device manufacturers to use foreign substrates, i.e. sub- strates of a material different from the actual device layers. As an example, common examples of substrate materials for GaN-based devices are sapphire and sili^¬ con carbide. Due to the commonly shared expectation of better device performance when native substrates, i.e. sub^¬ strates formed of the same material as the device lay^¬ ers, are used, there is a continuous and intense need in the market for stand-alone, i.e. free-standing high quality native substrates.

Several techniques for fabricating free-standing group III nitride substrates have been proposed. Generally, such substrates can be produced by depositing a thick layer of a group III nitride, typically having a thickness of several hundreds of micrometers, on a foreign substrate such as sapphire, A1203, SiC, Si, etc., and subsequently separating the foreign sub^¬ strate from the deposited nitride layer (s) . Substrate removal can be accomplished in various manners includ^¬ ing mechanical grinding, laser lift-off, etching, etc. However, this conventional approach has several limi^¬ tations. Ill-nitride deposition process necessitates high temperatures (typically 1000°C to 1100°C) . During cooling down from the growth temperature to room temperature, the Ill-nitride film undergoes a biaxial stress caused by the large difference between the thermal-expansion coefficients of the nitride crystal and the substrate material. This stress can cause cracking, bowing, generation of crystal defects, and other adverse effects.

In addition to direct deposition of a thick nitride layer on a foreign substrate, also well-known are several techniques wherein an intermediate nitride layer is first formed on a foreign substrate and treated so as to form a porous nitride layer, e.g. by UV assisted electrochemical etching. A thick nitride crystal layer is then grown on the porous intermediate layer. Final^¬ ly, the thick nitride layer is separated from the sub^¬ strate along the porous intermediate layer. As an ex- ample, US 2007/0082465 Al discloses a method for pro^¬ ducing a free-standing GaN substrate, wherein the porous intermediate layer is formed by providing an GaN layer in a reactor, and supplying HC1 and NH₃ gases into the reactor to treat the GaN layer. The separa- tion of the substrate from the thick GaN layer is facilitated by cracks or fractures in the porous layer caused by thermal stresses during cooling down the de^¬ posited structure from the deposition temperature. The main drawback of this technique is the limited control on the process.

PURPOSE OF THE INVENTION

The purpose of the present invention is to provide a novel, efficient and accurately controllable method for fabricating free-standing Ill-nitride substrates.

SUMMARY OF THE INVENTION The present invention is focused on a method for fab^¬ ricating a free-standing group III nitride substrate. "Free-standing" means here, according to the normal meaning thereof, a semiconductor crystal capable of being self-supported without need for any additional support structure. "Group III nitride" refers to any nitride of group III elements, such as aluminum ni^¬ tride A1N, gallium nitride GaN, Indium Nitride InN, and any alloy and combination of these. "Substrate" refers to the purpose of the fabricated object to serve as a native substrate for further deposition of such group III nitride.

The method comprises the steps of: depositing a first group III nitride layer on a growth substrate; forming a mechanically weakened sacrificial layer within the so formed structure; depositing a second group III ni^¬ tride layer on the first group III nitride layer; and separating the second group III nitride layer from the growth substrate along the mechanically weakened sac^¬ rificial layer.

The deposition of the first group III nitride layer can be performed by any known method suitable for pro- ducing single crystal group III nitrides, those meth^¬ ods comprising but not being limited to: vapor phase epitaxy (VPE) , chemical vapor deposition (CVD) , metal- organic chemical vapor deposition (MOCVD) , hydride va^¬ por epitaxy (HVPE) , and molecular beam epitaxy (MBE) . In depositing the first layer, the layer thickness should be limited so as to prevent crack formation. As clear for those skilled in the art, the maximum crack- free thickness is a function of: (1) the thermal ex^¬ pansion coefficient difference between the first group III nitride layer and the growth substrate; (2) the growth conditions; (3) the composition of the first group III nitride layer; and (4) the dislocation density in the first group III nitride layer. Generally, the thickness of the first group III nitride layer is preferably limited below 10 μπι, though in some cases it is possible to deposit also clearly thicker layers.

The growth substrate on which the first group III ni^¬ tride layer is deposited can be formed of any material suitable for said deposition of group III nitride thereon by the selected method. Sapphire as a rela- tively cheap material, also providing UV transparency for UV assisted etching possibly utilized in the meth^¬ od, is one good choice. Other substrate materials suitable for group III nitride deposition are, for ex^¬ ample, silicon carbide, silicon, zinc oxide, silicon oxide, gallium arsenide, lithium aluminate, and lithi^¬ um gallate.

Also the second group III nitride layer can formed by any method suitable for depositing epitaxial single crystal group III nitride starting on the surface of the existing first group III nitride layer. Possible methods comprise the same examples as proposed above for the deposition of the first group III nitride lay^¬ er, i.e. vapor-phase epitaxy (VPE) , chemical vapor deposition (CVD) , metal-organic chemical vapor deposi^¬ tion (MOCVD) , hydride vapor phase epitaxy (HVPE) , and molecular beam epitaxy (MBE) . Due to the highest growth rate provided by it, HVPE is in many cases a preferred choice. Also a combination of different dep^¬ osition methods is possible. For example, it is possi^¬ ble to grow first a thin portion of the second group III nitride layer by MOCVD and continue the deposition then by HVPE.

The accurate material compositions of the first and the second group III nitride layers can be the same. Alternatively, the compositions thereof can differ e.g. in the concentration and/or the material (e.g. Si or Mg) of the dopant. Also entirely different composi^¬ tions can be used in those two layers. For example, the material of one of the layers can be AlGaN whereas the other layer can be formed of InGaN.

It is important to note that each of the first and the second group III nitride "layers" can itself comprise several sub-layers and thus be a multi-layered struc- ture . For example, as well known in the art, it is common practice in depositing Ill-nitride layers on foreign substrates to utilize various buffer layers, for example low temperature GaN, A1N, AlGaN, graded AlGaN, super-lattice structures etc, on which the ac- tual nitride layer is deposited. This is the case also in depositing the first group III nitride layer in the method of the present invention. Respectively, the se^¬ cond group III nitride layer can comprise, for exam^¬ ple, one or more pairs of an undoped GaN layer fol- lowed by an n-type GaN layer, or of a GaN layer followed by AlGaN layer, etc. In those examples, the n- type layer of GaN can be used to produce a conductive n-type substrate. Respectively, the AlGaN layer can be used to produce a lattice matched substrate for GaN- based laser diodes The core principle of the invention relates to the step of forming a mechanically weakened sacrificial layer within the structure formed by said deposition of the first group III nitride layer on the growth substrate. Instead of the prior art approaches rely- ing, for example, on forming a porous layer within the first group III nitride layer, in the present inven^¬ tion, the step of forming a mechanically weakened sac^¬ rificial layer comprises: forming openings extending from the free surface of the first group III nitride layer to the interfacial region between the first group III nitride layer and the growth substrate; and etching laterally, via the openings, the first group III nitride layer in said interfacial region. In addi^¬ tion, in the present invention, in the step of depos- iting the second group III nitride layer, lateral overgrowth over the openings is provided so as to pro^¬ vide a non-interrupted layer.

The purpose of the openings is to enable an etchant to reach the interfacial region so as to allow said lat^¬ eral etching, i.e. etching in the direction along the interface between the first group III nitride layer and the growth substrate. By interfacial region is meant here the portion of the first group III nitride layer near the interface between the first group III nitride layer and the growth substrate. The extending of the openings to the interfacial region is required for concentrating the subsequent lateral etching pro^¬ cess in this region. The reason for concentrating the mechanical weakening of the structure by said lateral etching in this region, in turn, is that the stresses in the overall deposited structure are naturally high^¬ est at and close to said interface. On the other hand, also the dislocation density in the deposited nitride is inherently highest near the interface between the nitride and the growth substrate. The higher disloca- tion density makes the interfacial region to dissolve faster than the upper parts of the first group III ni^¬ tride layer, thus providing actually a self-aligned focusing of the etching to the region where also the stresses are at highest. This maximizes the possibil- ity to utilize the inherent stresses of the structure in the step of separating the second group III nitride layer from the growth substrate along the sacrificial layer . The thickness of the interfacial region to which the openings should extend, i.e. the thickness of the por^¬ tion of the first group III nitride layer in which the stress accumulation is highest and the peak disloca^¬ tion density strongest, depends on the materials and the growth processes used. In general, this interfa^¬ cial region is limited to the lower half of the first group III nitride layer, i.e. the half of this layer adjacent to the growth substrate. However, the thicker the first group III nitride layer is, the smaller is the portion of the overall layer thickness where those two effects are at their strongest, and to which por^¬ tion of the layer the openings thus should extend. As a result of the lateral etching, voids, i.e. empty volumes, are formed around the bottoms of the openings in the first group III nitride layer in the interfa- cial region. The network of these voids weakens the mechanical strength of the first group III nitride layer, thereby resulting in formation of a mechanically weakened region, i.e. the mechanically weakened sacrificial layer mentioned above. The optimal density of the openings and the size of the individual openings depend on the characteristics of the lateral etching process, e.g. the etching rate, and should be adjusted by taking into account the fol^¬ lowing conditions: (a) efficient delivery of the etch- ing species of the selected etching process to the in- terfacial region via the openings; (b) efficient re^¬ moval of the reaction products of the etching process from the interfacial region; and (c) efficient and successful overgrowth in the step of depositing the second group III nitride layer. In general, the diame^¬ ter of an individual opening can lie, for example, in the range of 1 to 10 μπι. The distance between adjacent openings should generally less than 100 μπι, preferably in the range of 10 to 50 μπι.

The approach according to the present invention involving said formation of openings and lateral etching of the interfacial region provides great advantages in enabling an efficient and, perhaps most important, well controllable way to perform the separation of the second group III nitride layer from the growth sub^¬ strate so as to form a free-standing nitride crystal for serving as a substrate for further nitride deposi^¬ tion. The controllability results from that the densi^¬ ty, shape, lateral dimensions, and the actual depth of the openings as well as the details of the lateral etching process can be freely adjusted, taking also into account the actual compositions and processing conditions of the nitride layers and the growth sub^¬ strate material. The controllability allows the struc^¬ ture, particularly the mechanically weakened sacrifi- cial layer, to be designed so that the separation takes place in situ during cooling down the deposited structure from the deposition temperature of the se^¬ cond group III nitride layer. Moreover, in the step of depositing the second group III nitride layer, the growth can be initiated on the non-treated areas of the surface of the first group III nitride layer out^¬ side the openings. This is a great simplification e.g. in comparison to the deposition on a porous first nitride layer in the process of US 2007/0082465 Al .

The minimum thickness of the second group III nitride layer is determined by the lateral overgrowth over the openings. In other words, this layer should, natural^¬ ly, be thick enough to completely close by the later- ally overgrown material the openings in the first group III nitride layer. Another issue to be taken in^¬ to account is the mechanical strength of the layer. It should be high enough to enable the separation of the second group III layer as a free-standing layer with- out cracking. In some cases, as low as some dozens of micrometers could be a sufficient thickness. However, in most cases, a thickness of at least 200 μπι, e.g. about 300 to 500 μπι is preferred.

Preferably, the second group III nitride layer is de- posited in a temperature greater than or equal to 700°C for facilitating separation of the second group III nitride layer from the growth substrate along the sacrificial layer by means of thermal stress induced during cooling down the formed structure from that temperature. In other words, in this embodiment, the usually non-desired stresses due to the mismatch of the thermal expansion coefficients between the nitride material and the growth substrate are utilized advan^¬ tageously in separation, in situ, of the growth sub- strate and the deposited nitride so as to form a free^¬ standing nitride crystal. By proper design and imple^¬ mentation of the openings and the lateral etching, even complete self-separation during said cooling down can be achieved. Irrespective of whether also external force is applied in order to carry out the separation, the separation is preferably anyway carried out before the temperature of the deposited composite is lowered to such a low level that the thermal stresses reach a critical level possibly causing cracks in the deposit- ed nitride.

The openings in the first group III nitride layer can be formed by various known techniques. Possible alter^¬ natives comprise at least the following: reactive ion etching RIE, inductively coupled plasma (ICP) etching, laser ablation, chemical wet etching, and chemical gas etching. Preferred methods are ICP and RIE, which are well established and reliable techniques to etch GaN and related materials. The thickness of the first group III nitride layer should be limited so as to al^¬ low the forming of openings extending down to the in- terfacial region with the selected technique. Also in the step of etching laterally the first group III ni^¬ tride layer, known processes like chemical wet etching or chemical gas etching can be used. In general, both the forming of the openings and the lateral etching should be performed so that the subsequent deposition of the second group III nitride layer is not impeded and the material quality thereof is not deteriorated. In other words, the forming of the openings or the lateral etching should not destroy or contaminate the surface of the first group III nitride layer, or oth^¬ erwise cause defects or imperfections in the subse^¬ quently grown second group III nitride layer.

Preferably, in the step of forming the openings, a metal masking layer is formed on the first group III nitride layer and patterned so as to have holes through it, and the first group III nitride layer is etched via the holes in the metal masking layer to form the openings. Such metal masking layer provides an accurate way to control the etching and thus the formation of the openings. Further, in one preferred embodiment, said etching laterally the first group III nitride in said interfacial region comprises electro^¬ chemical etching using the metal masking layer as an electrode to which a DC bias is coupled. In this em^¬ bodiment, the metal mask thus efficiently serves for two different purposes. In one further preferred embodiment, the selectivity of the etching is improved by that the lateral etching of the first group III nitride layer comprises apply^¬ ing UV light to the interfacial region so as to accom- plish photochemical etching. UV exposure further improves the selectivity of the etching. The UV exposure requires a transparent growth substrate such as sap^¬ phire. Due to the high UV absorbance of the group III nitrides like GaN, UV light applied to the interface of the growth substrate and the first group III ni^¬ tride layer through the transparent growth substrate is absorbed in the group III nitride within a thin layer (typically below 1 μπι) close to the interface. The effect of the absorption of the UV light is two- fold. First, it increases the rate of the etching re^¬ action (photochemical process) . Second, it creates electron-hole pairs, whereby the layer in which the UV light is absorbed becomes more conductive, which, in turn, enhances the electrochemical etching. In this sense, with regard to the interfacial region to which the openings should extend, in these kinds of embodi^¬ ments utilizing UV exposure, also the thickness of the layer where the UV light is absorbed, should be taken into account when determining the thickness of the in- terfacial region. In other words, the openings should extend so deeply into the first group III nitride lay^¬ er that said effects of the UV absorption can contrib^¬ ute in the etching. In addition to mechanical and thermal stresses, also thermal decomposition of group III nitride can be used in the step of forming the mechanically weakened sac- rificial layer or in the step of separating the second group III nitride layer from the growth substrate. When exposed to a sufficiently high temperature, the surface of a Ill-nitride crystal starts to release ni- trogen, thereby decomposing the nitride material. In the mechanically weakened sacrificial layer having the laterally etched voids therein, the high surface area of the voids result in that thermal decomposition of the nitride is much faster in this sub-layer than in the rest of the layered structure. Said sufficiently high temperature depends on the actual Ill-nitride composition. GaN decomposes at a wide range of temper^¬ atures and, for example, temperatures in the range of 1000 to 1200°C can be used to accomplish the decompo- sition. For AlGaN, the required temperature range is higher, whereas for InGaN it is lower than that required for GaN.

Thermal decomposition may occur already during the growth of the second group III nitride layer. This is a further reason for depositing this layer in a temperature greater than or equal to 700°C. Moreover, preferably, the method according to the present inven^¬ tion further comprises a particular step of baking the deposited structure, i.e. the stack of the growth sub^¬ strate and the first and the second group III nitride layers, in a temperature accomplishing thermal decom^¬ position of the nitride of the first group III nitride in the interfacial region.

The rate of thermal decomposition of group III ni^¬ trides slows down in ammonia atmosphere. In a pre- ferred embodiment of the present invention, this is utilized by that during said step of baking, ammonia atmosphere surrounding the deposited structure is pro^¬ vided. Pressure used during said baking can be, for example, 0.1 to 1 bar, and a suitable ammonia concen^¬ tration can be in the range of 10 to 100% (in, practice, these are typically limited by the growth equip^¬ ment properties) . Ammonia can reach only the outer surface of the deposited crystal and does not pene- trate through the first and second group III nitride layers into the voids in the mechanically weakened sacrificial layer. The decomposition rate of the sac^¬ rificial layer is thus much faster than that of the outer surface of the crystal.

BRIEF DESCRIPTION OF THE DRAWINGS

The present invention is described in more detail in the following with reference to the accompanying fig- ures, wherein Figure 1 illustrates the principle of a method according to one preferred embodiment of the present invention; Figure 2 illustrates a mask pattern suitable for use in the method according to Figure 1 ; and Figure 3 illustrates an etching arrangement suita- ble for use in the method according to Figure 1.

DETAILED DESCRIPTION OF THE INVENTION

The method illustrated in Figure 1 starts by providing a growth substrate 101 in step a) . The growth sub- strate is made of sapphire commonly used as substrate for epitaxial growth of group III nitrides. However, the growth substrate could also be formed of some oth- er material suitable for such epitaxial growth and al^¬ lowing the UV exposure as described below. In step b) , a first GaN layer 102 is formed on the growth sub^¬ strate by deposition by means of MOVPE . The thickness of this first nitride layer is limited below 10 μπι to avoid crack formation due to mechanical and thermal stresses resulting from the different lattice con^¬ stants and thermal expansion coefficients of sapphire and GaN, and to allow efficient etching through the layer in step e) . Next, in step c) , a metal layer 103 is deposited on top of the first GaN layer. This metal layer can be formed, for example, of a 1 μπι thick ti^¬ tanium film deposited by e-beam sputtering. In step d) , the metal layer 103 is patterned by means of pho- tolithography to form holes 104 through it. The holes can be formed, for example, according to the mask ge^¬ ometry shown in Figure 2. In the mask geometry of Figure 2, holes 104 with a diameter of 5 μπι are arranged in a hexagonal grid with a side length of the hexagon of 15 μπι, the grid having holes also in the centers of the hexagons. Then, in step e) , the first GaN layer 102 is selectively etched by means of ICP or RIE, us^¬ ing the metal layer as a mask, to create vertical openings 105 extending down to the interface 109 be- tween the growth substrate 101 and the first nitride layer 102.

In step f ) , the sample formed in steps a) to e) is im^¬ mersed in a liquid electrolyte, e.g. an aqueous solu- tion of KOH, a positive bias voltage is applied to the GaN film 102 by using the metal film as an electrode, and UV light is applied through the sapphire substrate 101 to the interface 109 between the growth substrate 101 and the first nitride layer 102 (coupling the bias voltage and applying the UV light not illustrated in Figure 1) . The overall arrangement used in this step can be, for example, the one shown in Figure 3. The arrangement of Figure 3 comprises a cylinder 111, at the bottom of which the sapphire growth substrate is attached with the first group III nitride layer on it towards the inside of the cylinder. This way formed container is filled with the electrolyte 113. Negative bias is coupled to a platinum mesh 112 immersed in the electrolyte. The liquid electrolyte is agitated by means of a mechanical mixer 114. As a result of the photochemical etching thereby ef^¬ fected, GaN near the interface 109 is partially dis^¬ solved, and voids 106 extending laterally from the bottoms of the openings are thereby formed. The etch^¬ ing is self-aligned to the interfacial region near the interface 109 due to the higher dislocation density there in comparison to the upper portions of the first GaN layer 102. The network of thus formed voids 106 in the first GaN layer 102 mechanically weakens the at^¬ tachment of the first GaN layer 102 and the growth substrate 101. In other words, a mechanically weakened layer 110 is formed in the first GaN layer 102 at the level of the voids 106. After said photochemical etch^¬ ing step, the rest of the metal layer 103 is removed. Next, in step g, the sample is loaded into a HVPE growth reactor and a second single crystal GaN layer 107 is deposited on top of the first GaN layer 102, the epitaxial growth being started on the non-etched portions of the first GaN layer 102. During this step, the openings 105 in the first GaN layer 102 are later^¬ ally overgrown to create a continuous layer with a flat surface. The second GaN layer 107 is grown to have the desired thickness (typically more than 300μπι) . In some cases, instead of depositing the entire thickness of this layer by HVPE, a combined pro^¬ cess where the deposition is started by MOCVD, after which the rest of the layer is deposited by HVPE, may be beneficial because forming a continuous layer starting on a non-continuous template is usually more straightforward in the MOCVD process. During the deposition of the second GaN layer 107, the growth temperature exceeding 700°C, e.g. around 1000°C, is used. After the actual deposition phase, the temperature is maintained at the deposition tem^¬ perature or elevated slightly, e.g. to about 1100°C, and ammonia is supplied to the growth reactor in order to provide an ammonia atmosphere surrounding the de^¬ posited structure. During this kind of baking, the high temperature makes GaN on the surfaces of the voids 106 to decompose, thereby further weakening the connection between the growth substrate and the deposited GaN layers. At the outer surfaces of the sample, such decomposition is prevented by the presence of the ammonia atmosphere. After completing the deposition of the second GaN layer 107, in step h) , the sample is cooled down. Due to the large decrease of temperature, high thermal stresses due to the different thermal expansion coef^¬ ficients of sapphire and GaN are induced, the stresses being highest at and near the interface 109 between the sapphire substrate 101 and the first GaN layer 102. These stresses tend to crack the sample along the mechanically weakened layer 110. With a proper number and size of the voids 106, this can lead to a complete self-separation of the second GaN layer 107 from the growth substrate 101. Alternatively, slight separation force can be applied to the sample to ensure complete separation. In any case, the separation is completed at a sufficiently high temperature in order to prevent formation of cracks in the second nitride layer 107 due to said thermal stresses. As a result, a free- standing crack-free GaN nitride substrate 100 suitable for further homoepitaxy is produced. Finally, the typ^¬ ically uneven and rough lower surface of the so formed substrate, resulted from the separation of the second group III nitride layer from the growth substrate along the mechanically weakened sacrificial layer 110 can be grinded and/or polished or otherwise finished (not illustrated in Figure 1) .

In the following, another process example in accord- ance with the present invention is described step-by- step :

I) Thin GaN growth on sapphire by MOCVD

1. Loading a c-plane sapphire (or A1203) sub- strate into an MOCVD reactor

2. Heating up to 1100°C and baking for 10 minutes in a hydrogen atmosphere 3. Cooling down to 550°C

4. Depositing 30 nm of GaN through the reaction of ammonia (NH3) and trimethylgallium (TMG) .

5. Stopping the TMG supply, heating up to 1050°C under flow of ammonia and hydrogen

6. Starting TMG supply again, growing -1.5 μπι of GaN

7. Stopping the TMG supply, cooling down to the room temperature

8. Unloading the wafer from the growth chamber

Photolithography

1. Cleaning the wafer in solvents/DI water, baking at 120°C to remove moisture

2. Applying a primer on the wafer surface, then removing the excess of the primer by spinning

3. Spinning about 1.3 μπι of Shipley 1813 photoresist at 5000rpm on the wafer

4. Soft baking the photoresist at 115°C for 60 seconds

5. Selectively exposing the photoresist through a mask

6. Developing the photoresist, rinsing in DI water, and drying, thereby leaving photoresist at the intended locations of the verti^¬ cal openings (see point V below)

7. Baking at 120°C for 5 min

Metal deposition 1. Depositing 300nm of titanium using e-beam evaporation technique

Metal lift-off

1. Selectively removing the titanium layer lift off in hot (70°C) photoresist remover

Etching of vertical channels

1. Etching, using Inductively Coupled Plasma (ICP) technique in argon-chlorine atmosphere, vertical openings in the GaN layer down to the sapphire substrate using the remaining titanium layer as a mask Photo-assisted electrochemical etching

1. Mounting the wafer to the etching apparatus according to Figure 3 (GaN side towards the interior)

2. Filling the cylinder thereby formed with KOH in H20 solution, with a concentration of

0.5-2.5 M (mol/1)

3. Connecting the titanium layer to a positive and the platinum mesh to a negative electrode

4. Agitating the solution by a mixer

5. Illuminating the backside (the side of sapphire) of the wafer by UV radiation with photons of energy larger than the bandgap of GaN; suitable intensity being a few W/cm² 6. Applying a DC bias voltage between the electrodes for initiating a current flow through the electrolyte solution 8. Stopping the etching when the desired undercutting is achieved; the required etching time varying depending on e.g. the electro^¬ lyte concentration, temperature, UV exposure intensity, current density, and the proper^¬ ties of the GaN layer

VII) Removal of the titanium layer

1. Removing the remaining titanium layer in HF:H20 solution

VIII) GaN overgrowth

1. Loading the wafer into a MOCVD reactor

2. Heating up to 1050°C under ammonia and ni- trogen

3. Starting GaN growth by supplying TMG and hydrogen into the reactor

4. Growing GaN until vertical channels are completely overgrown

5. Switching off the TMG and hydrogen supply, cool down to room temperature under the flow of ammonia

Thick GaN growth

1. Loading the wafer into a HVPE reactor

2. Heating up to 1050°C under flow of ammonia and nitrogen

3. Supplying GaCl to the growth zone to start GaN deposition

4. Stopping the deposition when the desired GaN thickness, typically >300μπι, is achieved 5. Cooling down to the room temperature under the flow of ammonia, wherein the deposited GaN spontaneously separates from the sapphire substrate because of thermal stresses

X) GaN cleaning, grinding and polishing

1. Cleaning the free-standing GaN wafer in aqua regia (HN03:HC1)

2. Grinding and polishing the GaN surface (s) following standard procedures

It is evident that many alternatives, modifications, and variations of the manufacturing process of the present invention will be apparent to those skilled in the art in light of the disclosure herein. It is in^¬ tended that the present invention be determined by the appended claims rather than by the language of the above specification, and that all such alternatives, modifications, and variations which form a conjointly cooperative equivalent are intended to be included within the spirit and scope of these claims. Moreover, with regard to the detailed description of the inven^¬ tion above, is to be noted that as the invention may be embodied in many forms without departing from the scope of the claims, it is to be understood that the examples and drawings above are presented for purposes of illustration and description only, and are not intended as a definition of the limits of the invention.

Claims

1. A method for fabricating a free-standing group III nitride substrate (100), the method comprising the steps of:

- depositing a first group III nitride layer

(102) on a growth substrate (101);

forming a mechanically weakened sacrificial layer (110) within the so formed structure;

- depositing a second group III nitride layer (107) on the first group III nitride layer

(102) ;

- and separating the second group III nitride layer (107) from the growth substrate (101) along the sacrificial layer (110),

characteri z ed in that the step of forming a me^¬ chanically weakened sacrificial layer (110) comprises:

forming openings (105) extending from the free surface of the first group III nitride layer (102) to the interfacial region (109) between the first group III nitride layer

(102) and the growth substrate (101); and

- etching laterally, via the openings (105), the first group III nitride layer (102) in said interfacial region (109);

and that in the step of depositing the second group III nitride layer (107), lateral overgrowth over the openings (105) is provided so as to provide a non- interrupted layer.

2. A method as defined in claim 1, wherein the second group III nitride layer (107) is deposited in a tem^¬ perature greater than or equal to 700°C for facilitat- ing separation of the second group III nitride layer (107) from the growth substrate (101) along the sacrificial layer (110) by means of thermal stress induced during cooling down the formed structure from said deposition temperature.

3. A method as defined in claim 1 or 2, wherein, in said forming the openings (105), a metal masking layer (103) is formed on the first group III nitride layer (102) and patterned so as to have holes (104) through it, and the first group III nitride layer (102) is etched via the holes (104) in the metal masking layer (103) .

4. A method as defined in claim 3, wherein said etching laterally the first group III nitride in said in- terfacial region (109) comprises electrochemical etch^¬ ing using the metal masking layer (103) as an electrode to which a DC bias voltage is coupled.

5. A method as defined in claim 4, wherein said etching laterally the first group III nitride in said in- terfacial region (109) comprises applying UV light to the interfacial region (109) so as to accomplish pho- tochemical etching.

6. A method as defined in any of claims 1 to 4, where^¬ in the method comprises a step of baking the deposited structure (101, 102, 107) in a temperature accomplish- ing thermal decomposition of the nitride of the first group III nitride layer (102) in the interfacial re^¬ gion .

7. A method as defined in claim 6, wherein during the step of baking, ammonia atmosphere surrounding the de^¬ posited structure (101, 102, 107) is provided.