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The present invention is an interactive method of creating and executing a logic diagram. The designer can pick and connect logic elements using a menu. The diagram can be edited and tested using a generic logic element. As the diagram is being created, an equations list is produced. The equations list is converted into an executable format by producing a compressed version of the equations list which is loaded into an execution table one record at a time. Each record can cause plural equations to be loaded and the equations are linked via token pointers. The unrelated equations are linked through input and output pointers. Each intermediate file record can cause record locations for associated input and output tokens to be preassigned. When executing, an input is percolated through the equations until an impasse is encountered. If a branch shape is encountered, a token pointer for a different branch is pushed onto a stack. When an impasse is encountered, the token pointer on the...

InventorDonald F. Furgerson
Original AssigneeWestinghouse Electric Corp.
Primary Examiner: Kevin A. Kriess
Current U.S. Classification716/102; 716/106; 716/136
International Classification: G06F 1560

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Citations

Cited PatentFiling dateIssue dateOriginal AssigneeTitle
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Referenced by

Citing PatentFiling dateIssue dateOriginal AssigneeTitle
US5005119Aug 29, 1989Apr 2, 1991General Electric CompanyUser interactive control of computer programs and corresponding versions of input/output data flow
US5050091Aug 21, 1990Sep 17, 1991Electric Editor, Inc.Integrated electric design system with automatic constraint satisfaction
US5155836Mar 17, 1989Oct 13, 1992Block diagram system and method for controlling electronic instruments with simulated graphic display
US5210699Sep 10, 1991May 11, 1993Siemens Components, Inc.Process for extracting logic from transistor and resistor data representations of circuits
US5224209Apr 23, 1986Jun 29, 1993Hitachi, Ltd.System for choosing between operation modes in a data processing system by interacting with a displayed a multinodal hierarchal figure
US5227122Apr 15, 1992Jul 13, 1993Combustion Engineering, Inc.Display device for indicating the value of a parameter in a process plant
US5247668Dec 8, 1992Sep 21, 1993VLSI Technology, Inc.Methods of realizing digital signal processors using a programmed compiler
US5377122Nov 1, 1993Dec 27, 1994LSI Logic CorporationLogic compiler for design of circuit models
US5537630Dec 5, 1994Jul 16, 1996International Business Machines CorporationMethod and system for specifying method parameters in a visual programming system
US5557532Nov 12, 1992Sep 17, 1996VLSI Technology, Inc.Parameterized generic compiler
US5566079Nov 12, 1992Oct 15, 1996VLSI Technology, Inc.Parameterized generic multiplier complier
US5598564Dec 20, 1994Jan 28, 1997System for implementing state table in computer code
US5880975Dec 5, 1996Mar 9, 1999Hewlett-Packard, Co.Method of producing simplified code from a circuit compiler
US5910900Dec 5, 1996Jun 8, 1999Hewlett-Packard, Co.Method of producing cache optimized code from a circuit compiler
US5949990Dec 5, 1996Sep 7, 1999Hewlett-Packard Co.Method of efficiently modeling tri-state gates
US5963922Feb 26, 1997Oct 5, 1999System for graphically mapping related elements of a plurality of transactions
US6068663Apr 25, 1997May 30, 2000NEC CorporationDesign support system with circuit designing data editing function
US8037351Apr 15, 2008Oct 11, 2011Broadcom CorporationApparatus and methods for restoring system operation states

Claims

1. A method of creating and executing logic diagrams to produce device outputs from device inputs, comprising the steps, executed by a computer, of:

(a) designating a logic symbol shape and a location on a dynamic diagram for that shape;
(b) creating a logic equation for the shape;
(c) placing the shape in a token block on the dynamic diagram;
(d) repeating steps (a)-(c) until the dynamic diagram is complete; and
(e) executing a logic diagram representing the dynamic diagram comprising the steps of:
(ei) creating execution equations from the logic equations; and
(eii) retrieving the device inputs and executing the execution equations with the device inputs to produce the device outputs.

2. A method as recited in claim 1, wherein step (a) comprises the steps of:

(ai) designating a shape from a shape library; and
(aii) converting the location on the dynamic diagram into a token block number.

3. A method as recited in claim 2, wherein step (b) comprises the step of:

(bi) creating a dynamic equation list entry from a static equation definition, where the entry includes the token block number, an operation code, an output position indicator and input position indicators.

4. A method as recited in claim 3, wherein step (c) comprises the step of:

(ci) transferring a shape from the shape library to the diagram at the token block number indicated that designates the location on the dynamic diagram.

5. A method as recited in claim 1, further comprising the step of:

(f) checking the dynamic diagram for completeness before execution of the logic diagram occurs.

6. A method as recited in claim 5, wherein step (f) comprises:

(fi) comparing occupied input and output positions, for each token block, with respective output and input positions of neighboring token blocks which are neighbors of said each token block.

7. A method as recited in claim 1, wherein step (ei) comprises the steps of:

(1) creating an intermediate file; and
(2) loading the intermediate file into an execution table.

8. A method of creating and executing logic diagrams to produce device outputs from device inputs, comprising the steps, executed by a computer, of:

(a) designating a logic symbol shape and a location on a dynamic diagram for that shape;
(b) creating a logic equation for the shape;
(c) placing the shape in a token block on the dynamic diagram;
(d) repeating steps (a)-(c) until the dynamic diagram is complete; and
(e) executing a logic diagram representing the dynamic diagram, step (e) comprising the steps of:
(ei) creating execution equations from the logic equations, step (ei) comprising the steps of:
(1) creating an intermediate file; and
(2) loading the intermediate file into an execution table, step (2) comprising the steps of:
(1a) creating at least one execution table record for each intermediate file record;
(1b) preassigning input and output execution table records, as necessary, for the at least one execution table record and linking the preassigned records using input and output record pointers; and
(1c) completing the input and output execution table records as a corresponding record in the intermediate file is encountered; and
(eii) retrieving the device inputs and executing the execution equations with the device inputs to produce the device outputs.

9. A method as recited in claim 8, wherein an intermediate file record corresponds to a multiple equation shape and said method further comprises the steps of:

(1d) creating multiple equation table records for the multiple equation shape;
(1e) linking the multiple equation table records using token pointers; and
(1f) preassigning input and output execution table records, as necessary, for the multiple equation table records.

10. A method as recited in claim 9, wherein step (eii) comprises the steps of:

(1) propagating device inputs through the equation table records until a multiple input execution table shape record is encountered;
(2) determining if all the inputs for the multiple input execution table shape record are available;
(3) processing the multiple input execution table shape record when all inputs are available; and
(4) continuing propagation of the device inputs.

11. A method as recited in claim 10 wherein step (eii) further comprises the steps of:

(5) pushing a token pointer onto a return stack when a multiple equation table record is encountered;
(6) continuing propagation of device inputs until an impasse is reached; and
(7) continuing propagation with the equation table record corresponding to the token pointer on the return stack.

12. A method as recited in claim 10, further comprising the steps of:

(8) examining the execution table records for incomplete logic states when all inputs and impasses have been processed;
(9) assuming a value for an unavailable input for shapes with incomplete logic states; and
(10) propagating the value through the execution table records.

13. A method of creating and executing logic diagrams to produce device outputs from device inputs, comprising the steps, executed by a computer, of:

(a) designating a logic symbol shape and a location on a dynamic diagram for that shape by designating a shape from a shape library and converting the location into a token block number;
(b) creating a logic equation for the shape by creating a dynamic equation list entry from a static equation definition, where the entry includes the token block number, an operation code, an output position indicator and input position indicators;
(c) placing the shape in a token block on the dynamic diagram by transferring the shape from the shape library to the dynamic diagram at the token block number indicated;
(d) repeating steps (a)-(c) until the dynamic diagram is complete; and
(e) executing a logic diagram by creating execution equations from the logic equations and retrieving the device inputs and executing the execution equations with the device inputs to produce the device outputs, where executing the execution equations includes:
(1) propagating device inputs through equation table records until a multiple input execution table shape record is encountered;
(2) determining if all the inputs for the multiple input equation table shape record are available;
(3) processing the multiple input execution table shape record when all inputs are available;
(4) continuing propagation of the device inputs;
(5) pushing a token pointer onto a return stack when a multiple equation table record is encountered;
(6) continuing propagation of device inputs until an impasse is reached;
(7) continuing propagation with the equation table record corresponding to the token pointer;
(8) examining the execution table records for incomplete logic states when all inputs and impasses have been processed;
(9) assuming a value for an unavailable input for shapes with incomplete logic states; and
(10) propagating the value through the equation table records.

14. A method of creating logic diagrams, comprising the steps, executed by a computer, of:

(a) designating a logic symbol shape and a location on a dynamic diagram for that shape;
(b) creating a logic equation for the shape;
(c) placing the shape in a token block on the dynamic diagram; and
(d) repeating steps (a)-(c) until the dynamic diagram is complete.

15. A method as recited in claim 14, wherein step (a) comprises the steps of:

(ai) designating a shape from a shape library; and
(aii) converting the location into a token block number.

16. A method as recited in claim 15, wherein step (b) comprises the step of:

(bi) creating a dynamic equation list entry from a static equation definition, where the entry includes a token block number, an operation code, an output position indicator and input position indicators.

17. A method as recited in claim 16, wherein step (c) comprises the step of:

(ci) transferring a shape from the shape library to the dynamic diagram at the token block number indicated.

18. A method as recited in claim 14, further comprising the step of:

(d) checking the dynamic diagram for completeness.

19. A method as recited in claim 18, wherein step (d) comprises:

(di) comparing occupied input and output positions, for each token block, with respective output and input positions of neighboring token blocks which are neighbors of said each token block.

20. A method of creating and executing logic diagrams to produce device outputs from device inputs, comprising the steps, executed by a computer, of:

(a) designating a logic symbol shape and a location on a dynamic diagram for that shape by designating a shape from a shape library and converting the location into a token block number;
(b) creating a logic equation for the shape by creating a dynamic equation list entry from a static equation definition, where the entry includes the token block number, an operation code, an output position indicator and input position indicators;
(c) placing the shape in a token block on the dynamic diagram and transferring a shape from the shape library to the dynamic diagram at the token block number indicated;
(d) repeating steps (a)-(c) until the dynamic diagram is complete,
(e) creating execution equations from the logic equations; and
(f) retrieving the device inputs and executing the execution equations with the device inputs to produce the device outputs.

21. A method as recited in claim 20, wherein step (e) comprises the steps of:

(1) creating an intermediate file; and
(2) loading the intermediate file into an execution table.

22. A method of executing logic equations, comprising steps, executed by a computer, of:

(a) creating execution equations from the logic equations, step (a) comprising the steps of:
(1) creating an intermediate file; and
(2) loading the intermediate file into an execution table, step (2) comprising the steps of:
(2a) creating at least one execution table record for each intermediate file record;
(2b) preassigning input and output execution table records, as necessary, for the at least one execution table record and linking the preassigned records using input and output record pointers; and
(2c) completing the input and output execution table records as a corresponding record in the intermediate file is encountered; and
(b) retrieving the device inputs and executing the execution equations with device inputs to produce device outputs.

23. A method as recited in claim 22, wherein an intermediate file record corresponds to a multiple equation shape and said method further comprises the steps of:

(2d) creating multiple equation table records for the multiple equation shape;
(2e) linking the multiple equation table records using token pointers; and
(2f) preassigning input and output execution table records, as necessary, for the multiple equation table records.

24. A method as recited in claim 23, wherein step (f) comprises the steps of:

(1) propagating device inputs through the equation table records until a multiple input execution table shape record is encountered;
(2) determining if all the inputs for the multiple input equation table shape record are available;
(3) processing the multiple input execution table shape record when all inputs are available; and
(4) continuing propagation of the device inputs.

25. A method as recited in claim 24, wherein step (f) further comprises the steps of:

(5) pushing the token pointer onto a return stack when a multiple equation table record is encountered;
(6) continuing propagation of device inputs until an impasse is reached; and
(7) continuing propagation with the equation table record corresponding to the token pointer.

26. A method as recited in claim 24, further comprising the steps of:

(8) examining the execution table records for incomplete logic states when all inputs and impasses have been processed;
(9) assuming a value for an unavailable input for shapes with incomplete logic states; and
(10) propagating the value through the equation table records.

27. A method executing logic equations, comprising the steps, executed by a computer, of:

(a) creating execution equations from logic equations; and
(b) retrieving device inputs and executing the execution equations with the device inputs to produce device outputs and including the steps of:
(1) propagating the device inputs through equation table records until a multiple input execution table shape record is encountered;
(2) determining if all the inputs for the multiple input equation table shape record are available;
(3) processing the multiple input execution table shape record when all inputs are available;
(4) continuing propagation of the device inputs;
(5) pushing a token pointer onto a return stack when a multiple equation table record is encountered;
(6) continuing propagation of device inputs until an impasses is reached;
(7) continuing propagation with the equation table record corresponding to the token pointer;
(8) examining the execution table records for incomplete logic states when all inputs and impasses have been processed;
(9) assuming a value for an unavailable input for shapes with incomplete logic states; and
(10) propagating the value through the equation table records.