A finished pattern that will be formed based on a design layout pattern in a semiconductor manufacturing process is predicted, and the outline of the predicted finished pattern is converted into a polygon. On the other hand, test reference patterns are formed based on the design layout pattern. A pattern...http://www.google.com/patents/US6343370?utm_source=gb-gplus-sharePatent US6343370 - Apparatus and process for pattern distortion detection for semiconductor process and semiconductor device manufactured by use of the apparatus or process
