A wafer stage overlay error map is created using standard overlay targets and a special numerical algorithm. A reticle including a 2-dimensional array of standard overlay targets is exposed several times onto a photoresist coated silicon wafer using a photolithographic exposure tool. After exposure,...http://www.google.com/patents/US7871004?utm_source=gb-gplus-sharePatent US7871004 - Method and apparatus for self-referenced wafer stage positional error mapping
