A method for testing for power supply network voltage drop violations in an integrated circuit through a computer simulation. First, the IC chip area is divided into a number of discrete regions. The simulation time is divided into a number of time segments. Next, the average aggregate currents corresponding...http://www.google.com/patents/US5933358?utm_source=gb-gplus-sharePatent US5933358 - Method and system of performing voltage drop analysis for power supply networks of VLSI circuits
