To provide a semiconductor storage device capable of reducing the number of ECC bits. A semiconductor storage device according to an embodiment of the invention includes a memory cell array, an ECC cell storing ECC bits, and an ECC computating circuit calculating the ECC bits, which calculates first...http://www.google.com/patents/US20060156196?utm_source=gb-gplus-sharePatent US20060156196 - Semiconductor storage device and pseudo SRAM
