This invention relates to the general area of data integrety in digital computers. In particular it relates to digital computer systems having parity checked systems busses and ECC checked memory. This invention increases the performance of such systems by reducing the memory latency incurred in the...http://www.google.com/patents/US5384788?utm_source=gb-gplus-sharePatent US5384788 - Apparatus and method for optimal error correcting code to parity conversion
