A microprocessor capable of being incorporated in an information processing system with a cache memory unit and capable of realizing fine cache bypass control. The microprocessor can detect data to be cache-bypassed without checking bus status signals. The microprocessor is equipped with a cache bypass...http://www.google.com/patents/US5247639?utm_source=gb-gplus-sharePatent US5247639 - Microprocessor having cache bypass signal terminal
