A method and circuitry for a delay lock loop useful in synchronizing the accessing of a memory array with a system clock is disclosed. In a preferred embodiment, the delay lock loop includes a variable delay element. The delay of the variable delay element is initially set to a minimum delay value. The...http://www.google.com/patents/US6680874?utm_source=gb-gplus-sharePatent US6680874 - Delay lock loop circuit useful in a synchronous system and associated methods
