A method of clock buffer partitioning includes the steps of receiving as input a description of a number of clock buffers for buffering a system clock to a plurality of clocked circuit elements; constructing a balanced clock tree from the description wherein the balanced clock tree includes a plurality...http://www.google.com/patents/US6502222?utm_source=gb-gplus-sharePatent US6502222 - Method of clock buffer partitioning to minimize clock skew for an integrated circuit design
