A semiconductor memory device includes a plurality of memory cells, a memory cell array, bit lines, word lines, select gate lines, a column decoder, a first row decoder, a second row decoder, and first metal wiring. The memory cell includes a first MOS transistor with a charge accumulation layer and...http://www.google.com/patents/US6937514?utm_source=gb-gplus-sharePatent US6937514 - Semiconductor memory device including MOS transistors each having a floating gate and a control gate
