Disclosed are embodiments of on-chip identification circuitry. In one embodiment, pairs of conductors (e.g., metal pads, vias, lines) are formed within one or more metallization layers. The distance between the conductors in each pair is predetermined so that, given known across chip line variations,...http://www.google.com/patents/US20090091351?utm_source=gb-gplus-sharePatent US20090091351 - CHIP IDENTIFICATION SYSTEM AND METHOD
