An apparatus to improve the speed of handling of denormal numbers in a computer system, the apparatus comprising a mode bit and a selector, the mode bit set when denormals are to be replaced by zero, the selector having a first input and an output, the first input comprising a floating point number,...http://www.google.com/patents/US5886915?utm_source=gb-gplus-sharePatent US5886915 - Method and apparatus for trading performance for precision when processing denormal numbers in a computer system
