A memory cell array includes a first memory cell, a second memory cell, and a bit line which extends between the first and second memory cells. During normal operation, the bit line is used as a write path for data values to be written to the first and second memory cells. If the first memory cell ...http://www.google.com/patents/US5831907?utm_source=gb-gplus-sharePatent US5831907 - Repairable memory cell for a memory cell array
