A processor-implemented means of designing a power pad layout includes determining a location of at least one ESD structure so as to minimize a placement cost and determining a location of at least one connection between the at least one ESD structure and at least one power ring. The step of determining...http://www.google.com/patents/US7657858?utm_source=gb-gplus-sharePatent US7657858 - Automated electrostatic discharge structure placement and routing in an integrated circuit
