A superscalar processor and method are disclosed for efficiently recovering from misaligned data addresses. The processor includes a memory device partitioned into a plurality of addressable memory units. Each of the plurality of addressable memory units has a width of a first plurality of bytes. A determination...http://www.google.com/patents/US6289428?utm_source=gb-gplus-sharePatent US6289428 - Superscaler processor and method for efficiently recovering from misaligned data addresses
