A scan path test architecture for testing circuits using multiple system clocks with different frequencies includes a controller (16) for disabling the system clocks during a test cycle and a master clock for generating a signal frequency signal to each circuit module (10a-c), eliminating the need for...http://www.google.com/patents/US5488613?utm_source=gb-gplus-sharePatent US5488613 - Scan test circuits for use with multiple frequency circuits
