A ROM array comprises orthogal sets of buried bit lines and polysilicon wordlines. The buried bit lines comprise trenches with insulating material on the side walls, the trenches then being filled with polysilicon. This reduces bit line sheet resistance and increases the punch-through voltage between...http://www.google.com/patents/US5529943?utm_source=gb-gplus-sharePatent US5529943 - Method of making buried bit line ROM with low bit line resistance
