Under software control, a loss of clock detect circuit (24) can be enabled to detect loss of clock. A plurality of different clock signals, including the input reference clock (34) to the PLL (12) and the feedback (36) from the PLL (12), are monitored by the loss of clock circuit (24). When the currently...http://www.google.com/patents/US5903748?utm_source=gb-gplus-sharePatent US5903748 - Method and apparatus for managing failure of a system clock in a data processing system
