An improved method of forming an integrated circuit, which includes forming a conductive layer on a substrate, then forming a dielectric layer on the conductive layer. After forming the dielectric layer, a layer of photoresist is patterned to define a region to be etched. A first etched region is then...http://www.google.com/patents/US6365529?utm_source=gb-gplus-sharePatent US6365529 - Method for patterning dual damascene interconnects using a sacrificial light absorbing material
