A plurality of improved memory systems employing a phase detection system in conjunction with either a synchronous mirror delay or a delay-locked loop, and related methods of operation, are disclosed. The memory systems determine timing characteristics among multiple signals and, based upon those timing...http://www.google.com/patents/US7443743?utm_source=gb-gplus-sharePatent US7443743 - Method and system for improved efficiency of synchronous mirror delays and delay locked loops
