A VLSI circuit including memory is viewed as a finite state object machine and for testability a finite state test machine is embedded in the finite state object machine. To make the embedding practiced, the object test machine is partitioned into components and separate test machines are embedded into...http://www.google.com/patents/US5461573?utm_source=gb-gplus-sharePatent US5461573 - VLSI circuits designed for testability and methods for producing them
