In general, in one aspect, the disclosure describes a processor that includes an instruction store to store instructions of at least a portion of at least one program and multiple engines coupled to the shared instruction store. The engines provide multiple execution threads and include an instruction...http://www.google.com/patents/US8087024?utm_source=gb-gplus-sharePatent US8087024 - Multiple multi-threaded processors having an L1 instruction cache and a shared L2 instruction cache
