A data read circuit and method for use in a semiconductor memory device that has a memory cell array are provided. The circuit includes a selector for selecting a unit cell within the memory cell array in response to an address signal; a clamping unit for supplying a clamp voltage having a level for...http://www.google.com/patents/US20060034112?utm_source=gb-gplus-sharePatent US20060034112 - Data read circuit for use in a semiconductor memory and a method therefor
