A method of performing contiguous write transactions on a processor bus according to an embodiment of the present invention includes detecting, by a bus agent, a request for a write cycle, asserting, by the bus agent, a target ready signal for one clock cycle in response to the write cycle during a first...http://www.google.com/patents/US7543094?utm_source=gb-gplus-sharePatent US7543094 - Target readiness protocol for contiguous write
