The data processing system, a combination of multithreaded architecture and a VLIW (Very Long Instruction Word) processor is adapted to process plural threads. The system uses multiple program counters for context-switching only a subinstruction which causes a long latency. A method is provided for processing...http://www.google.com/patents/US6216220?utm_source=gb-gplus-sharePatent US6216220 - Multithreaded data processing method with long latency subinstructions
