A method of manufacturing a memory device includes an nMOS region and a pMOS region in a substrate. A first gate is defined within the nMOS region, and a second gate is defined in the pMOS region. Disposable spacers are simultaneously defined about the first and second gates. The nMOS and pMOS regions...http://www.google.com/patents/US7858458?utm_source=gb-gplus-sharePatent US7858458 - CMOS fabrication
