A three-dimensional memory array includes a plurality of rail-stacks on each of several levels forming alternating levels of X-lines and Y-lines for the array. Memory cells are formed at the intersection of each X-line and Y-line. The memory cells of each memory plane are all oriented in the same direction...http://www.google.com/patents/US6754102?utm_source=gb-gplus-sharePatent US6754102 - Method for programming a three-dimensional memory array incorporating serial chain diode stack
