A semiconductor memory device includes an M-by-N memory array having a number M of complete words, each of the complete words having a number N of bits. The memory array further has M word lines to address the M complete words, and N bit lines to access the N bits. The number N has a number p of integer...http://www.google.com/patents/US6046957?utm_source=gb-gplus-sharePatent US6046957 - Semiconductor memory device with flexible configuration
