A geometric DAC architecture includes a series of substantially identical sub-DACs, each sub-DAC having n taps. The sub-DACs are fed from a bias-DAC having m(total number of taps needed)/n taps. The output of each of the m taps is increased geometrically at a rate of kn. The geometric DAC architecture...http://www.google.com/patents/US6734815?utm_source=gb-gplus-sharePatent US6734815 - Geometric D/A converter for a delay-locked loop