An embodiment of the invention reduces the external resistance of a transistor by utilizing a silicon germanium alloy for the source and drain regions and a nickel silicon germanium self-aligned silicide (i.e., salicide) layer to form the contact surface of the source and drain regions. The interface...http://www.google.com/patents/US20080044968?utm_source=gb-gplus-sharePatent US20080044968 - Method for improving transistor performance through reducing the salicide interface resistance
