The method of the present invention includes forming a silicon dioxide layer, a first conductive layer and a first oxide layer on a silicon substrate to define a gate region of transistors. Then, a pad oxide layer is formed on the silicon substrate and a second oxide layer is formed on a side of the...http://www.google.com/patents/US6063680?utm_source=gb-gplus-sharePatent US6063680 - MOSFETS with a recessed self-aligned silicide contact and an extended source/drain junction
