A method of estimating a period and a time delay, or phase, of an input signal. A plurality of transition times {tilde over (t)}i are received, each transition time {tilde over (t)}i having a weight {tilde over ()}i comprising a forgetting factor and a weighting factor {tilde over ()}i. Upon receiving...http://www.google.com/patents/US6504887?utm_source=gb-gplus-sharePatent US6504887 - Apparatus and method for an error minimizing phase locked loop
