In a delay locked loop (DLL) based clock signal synthesizer, which overcomes the accumulated jitter and reference clock noise problems of VCO based circuits, the VCO is replaced by a multi-stage delay line formed by differential variable delay elements. The outputs of the delay stages are fed into differential...http://www.google.com/patents/US6037812?utm_source=gb-gplus-sharePatent US6037812 - Delay locked loop (DLL) based clock synthesis
