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A frequency synthesizer of the fractional N type comprising a primary voltage controlled oscillator for producing an output signal which is afforded to a phase detector via a divider to provide a control signal for the primary voltage controlled oscillator in the presence of a phase difference between a reference signal from a reference source and the signal afforded thereto from the divider, the division ratio of which may be varied in a fractional N mode to vary the frequency of the output signal in frequency steps smaller than the frequency of the reference signal and wherein a ripple signal tending thereby to be produced and causing frequency modulation of the output signal is compensated by a phase modulator, arranged to couple the divider and the phase detector and to receive a drive signal in antiphase to the ripple signal, wherein the synthesizer further comprises a subsidiary phase lock loop arranged to provide an enhanced representation of the ripple signal in dependence...

InventorColin Attenborough
Original AssigneePlessey Overseas Limited
Primary Examiner: David Mis
Current U.S. Classification331/2; 331/15; 331/16; 331/25
International Classification: H03L 706

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Citations

Cited PatentFiling dateIssue dateOriginal AssigneeTitle
US3798550Dec 8, 19721974FM RECEIVER
US4609881May 3, 1984Sep 2, 1986Marconi Instruments LimitedFrequency synthesizers

Referenced by

Citing PatentFiling dateIssue dateOriginal AssigneeTitle
US4994768Mar 26, 1990Feb 19, 1991Motorola, Inc.Frequency synthesizer with FM modulation
US5021754Jul 16, 1990Jun 4, 1991Motorola, Inc.Fractional-N synthesizer having modulation spur compensation
US5045813Feb 21, 1990Sep 3, 1991Nihon Musen Kabushiki KaishaSlip phase control PLL
US5216374Jul 3, 1991Jun 1, 1993General Instrument CorporationFrequency synthesizer utilizing pulse-width modulation of digital VCO control signal
US5224132Jan 17, 1992Jun 29, 1993Sciteq Electronics, Inc.Programmable fractional-N frequency synthesizer
US5424688Apr 22, 1994Jun 13, 1995Rockwell International Corp.Frequency synthesizer apparatus incorporating phase modulation tracking means
US5495206Oct 29, 1993Feb 27, 1996Motorola, Inc.Fractional N frequency synthesis with residual error correction and method thereof
US5889436Nov 1, 1996Mar 30, 1999National Semiconductor CorporationPhase locked loop fractional pulse swallowing frequency synthesizer
US6064272Jul 1, 1998May 16, 2000Conexant Systems, Inc.Phase interpolated fractional-N frequency synthesizer with on-chip tuning
US6137372May 29, 1998Oct 24, 2000Silicon Laboratories Inc.Method and apparatus for providing coarse and fine tuning control for synthesizing high-frequency signals for wireless communications
US6147567May 29, 1998Nov 14, 2000Silicon Laboratories Inc.Method and apparatus for providing analog and digitally controlled capacitances for synthesizing high-frequency signals for wireless communications
US6150891May 29, 1998Nov 21, 2000Silicon Laboratories, Inc.PLL synthesizer having phase shifted control signals
US6226506May 29, 1998May 1, 2001Silicon Laboratories, Inc.Method and apparatus for eliminating floating voltage nodes within a discreetly variable capacitance used for synthesizing high-frequency signals for wireless communications
US6233441May 29, 1998May 15, 2001Silicon Laboratories, Inc.Method and apparatus for generating a discretely variable capacitance for synthesizing high-frequency signals for wireless communications
US6304146May 29, 1998Oct 16, 2001Silicon Laboratories, Inc.Method and apparatus for synthesizing dual band high-frequency signals for wireless communications
US6308055May 29, 1998Oct 23, 2001Silicon Laboratories, Inc.Method and apparatus for operating a PLL for synthesizing high-frequency signals for wireless communications
US6311050May 29, 1998Oct 30, 2001Silicon Laboratories, Inc.Single integrated circuit phase locked loop for synthesizing high-frequency signals for wireless communications and method for operating same
US6317006Jul 21, 2000Nov 13, 2001Silicon Laboratories, Inc.Frequency synthesizer utilizing phase shifted control signals
US6323735May 25, 2000Nov 27, 2001Silicon Laboratories, Inc.Method and apparatus for synthesizing high-frequency signals utilizing on-package oscillator circuit inductors
US6327463May 29, 1998Dec 4, 2001Silicon Laboratories, Inc.Method and apparatus for generating a variable capacitance for synthesizing high-frequency signals for wireless communications
US6356159Jul 20, 2000Mar 12, 2002Texas Instruments IncorporatedPLL frequency synthesizer with ripple current compensating circuit
US6388536Jun 27, 2000May 14, 2002Silicon Laboratories Inc.Method and apparatus for providing coarse and fine tuning control for synthesizing high-frequency signals for wireless communications
US6483390Aug 23, 2001Nov 19, 2002Silicon Laboratories Inc.Method and apparatus for synthesizing dual band high-frequency signals for wireless communications
US6549764Apr 30, 2001Apr 15, 2003Silicon Laboratories Inc.Method and apparatus for selecting capacitance amounts to vary the output frequency of a controlled oscillator
US6549765Aug 20, 2001Apr 15, 2003Silicon Laboratories, Inc.Phase locked loop circuitry for synthesizing high-frequency signals and associated method
US6574288May 29, 1998Jun 3, 2003Silicon Laboratories Inc.Method and apparatus for adjusting a digital control word to tune synthesized high-frequency signals for wireless communications
US6710951Oct 31, 2001Mar 23, 2004Western Digital Technologies, Inc.Phase locked loop employing a fractional frequency synthesizer as a variable oscillator
US6760575Oct 9, 2001Jul 6, 2004Silicon Laboratories, Inc.Method and apparatus for generating a variable capacitance for synthesizing high-frequency signals for wireless communications
US6965761Feb 5, 2003Nov 15, 2005Silicon Laboratories, Inc.Controlled oscillator circuitry for synthesizing high-frequency signals and associated method
US6993307Oct 8, 2003Jan 31, 2006Silicon Laboratories, Inc.Method and apparatus for operating a PLL with a phase detector/sample hold circuit for synthesizing high-frequency signals for wireless communications
US6993314Feb 13, 2002Jan 31, 2006Silicon Laboratories Inc.Apparatus for generating multiple radio frequencies in communication circuitry and associated methods
US7035607Jul 31, 2003Apr 25, 2006Silicon Laboratories Inc.Systems and methods for providing an adjustable reference signal to RF circuitry
US7092675Feb 13, 2002Aug 15, 2006Silicon LaboratoriesApparatus and methods for generating radio frequencies in communication circuitry using multiple control signals
US7200364Dec 23, 2005Apr 3, 2007Silicon LaboratoriesFrequency modification circuitry for use in radio-frequency communication apparatus and associated methods
US7221921Dec 8, 2003May 22, 2007Silicon LaboratoriesPartitioning of radio-frequency apparatus
US7242912Jul 31, 2003Jul 10, 2007Silicon Laboratories Inc.Partitioning of radio-frequency apparatus
US7353011Jul 13, 2005Apr 1, 2008Silicon Laboratories Inc.Method and apparatus for operating a PLL for synthesizing high-frequency signals for wireless communications

Claims

1. A frequency synthesiser of the fractional N type comprising a primary voltage controlled oscillator for producing an output signal which is afforded to a phase detector via a primary divider to provide a control signal for the primary voltage controlled oscillator in the presence of a phase difference between a reference signal from a reference source and the signal afforded thereto from the primary divider, the division ratio of which may be varied in a fractional N mode to vary the frequency of the output signal in frequency steps smaller than the frequency of the reference signal and wherein a ripple signal tending thereby to be produced and causing frequency modulation of the output signal is compensated by a phase modulator, arranged to couple the primary divider and the phase detector and to receive a drive signal wherein the synthesiser further comprises a subsidiary phase lock loop arranged to provide an enhanced representation of the ripple signal in dependence upon the signal afforded to the phase detector from the phase modulator, and a digital to analogue converter arranged to provide the drive signal for the phase modulator in dependence upon the enhanced representation of the ripple signal.

2. A synthesiser according to claim 1 wherein the subsidiary phase lock loop comprises a subsidiary voltage controlled oscillator having a sensitivity lower than that of the primary voltage controlled oscillator, a subsidiary divider, and a subsidiary phase detector arranged to receive as a reference signal for the subsidiary phase lock loop a signal dependent upon the signal afforded to the phase detector from the phase modulator.

3. A synthesiser according to claim 2 wherein the subsidiary voltage controlled oscillator comprises a voltage tuned crystal oscillator.

4. A synthesiser according to one of claims 1, 2 or 3 comprising a sense detecting circuit, responsive to the enhanced respresentation of the ripple signal for providing a signal indicative of the sense of any error in the level of the drive signal to the phase modulator.

5. A synthesiser according to claim 4 comprising a voltage generator circuit arranged to provide a signal dependent upon the mean division ratio of the primary divider, and wherein the digital to analogue converter comprises a multiplying digital to analogue converter arranged to receive a reference signal dependent upon the combination of the signal provided by the voltage generator circuit and the signal provided by the sense detecting circuit and wherein the digital to analogue converter is arranged to provide the drive signal for the phase modulator in dependence upon the reference signal afforded thereto.

6. A synthesiser according to claim 4 wherein the sense detecting circuit comprises a first limiter arranged to receive a signal dependent upon the output signal from the digital to analogue converter and to provide a limited output signal therefrom, a further limiter arranged to receive a signal dependent upon the enhanced representation of the ripple signal provided by the subsidiary phase lock loop and to provide a limited output signal therefrom, and an exclusive OR gate arranged to receive output signals provided by the first and further limiters and to provide therefrom a signal indicative of the sense of the ripple signal.

7. A synthesiser according to claim 6 wherein the sense detecting circuit comprises a low pass filter for filtering the signal dependent upon the output signal from the digital to analogue converter.