A memory cell includes a semiconductor substrate; and a first, a second, and a third transistor. The first transistor includes a first dielectric over the semiconductor substrate; and a first floating gate over the first dielectric. The second transistor is electrically coupled to the first transistor...http://www.google.com/patents/US7968926?utm_source=gb-gplus-sharePatent US7968926 - Logic non-volatile memory cell with improved data retention ability
