A method for making an electrically programmable and erasable memory cell is disclosed. Specifically, a method for creating a floating gate using shallow trench isolation-type techniques is utilized to provide a floating gate having sharply defined tip characteristics. A first insulating layer is formed...http://www.google.com/patents/US6586302?utm_source=gb-gplus-sharePatent US6586302 - Method of using trenching techniques to make a transistor with a floating gate
