A system and method for predicting a branch target for a current instruction in a microprocessor, the system comprising a cache storing indirect branch instructions and a path register. The path register is updated on certain branches by an XOR operation on the path register and the branch instruction,...http://www.google.com/patents/US20050262332?utm_source=gb-gplus-sharePatent US20050262332 - Method and system for branch target prediction using path information
