A structure and method for high density programmable logic device (PLD) testing, programming, and verification is disclosed. The device employs non-volatile memory cells, such as electrically erasable programmable ROM (EEPROM), as its programmable elements. The structure and method allow the PLD to work...http://www.google.com/patents/US5970005?utm_source=gb-gplus-sharePatent US5970005 - Testing structure and method for high density PLDs which have flexible logic built-in blocks
