A data processing circuit (201) is shown having elements (315, 310) which operate in response to decoded instruction while receiving clocking signals. Instruction types are identified and clocking signals to at least one of the elements is enabled or disabled in dependence upon whether the element is...http://www.google.com/patents/US6202163?utm_source=gb-gplus-sharePatent US6202163 - Data processing circuit with gating of clocking signals to various elements of the circuit
