A dynamic logic system is disclosed that uses transmission gates coupled between the inputs and output of inverting CMOS logic gates creating a "vented" CMOS logic gate (VCMOS). A clock is used to turn the transmission gates on during a pre-charge or "vent" cycle which causes the inputs and output of...http://www.google.com/patents/US6420905?utm_source=gb-gplus-sharePatent US6420905 - Vented CMOS dynamic logic system
