A memory device is operable in either a high mode or a low speed mode. In either mode, 32 bits of data from each of two memory arrays are prefetched into respective sets of 32 flip-flops. In the high-speed mode, the prefetched data bits are transferred in parallel to 4 parallel-to-serial converters,...http://www.google.com/patents/US6693836?utm_source=gb-gplus-sharePatent US6693836 - Memory device and method having data path with multiple prefetch I/O configurations
