A CMOS circuit in which the threshold voltage of at least one MOS transistor of the CMOS circuit is altered is disclosed. By altering the threshold voltage the speed/power dissipation tradeoff can be modified to match the design criteria of a particular CMOS circuit. For example, to increase the pull-up...http://www.google.com/patents/US5629638?utm_source=gb-gplus-sharePatent US5629638 - Adaptive threshold voltage CMOS circuits
