A semiconductor device comprises a plurality of memory cells, a central processing unit, a timer circuit which times a RESET time, and a timer circuit which times a SET time. A threshold voltage of an NMOS transistor of each memory cell is lower than that of the peripheral circuit, thereby easily executing...http://www.google.com/patents/US7206216?utm_source=gb-gplus-sharePatent US7206216 - Semiconductor device with a non-erasable memory and/or a nonvolatile memory
