A method of etching polysilicon using an oxide hard mask using a three step etch process. Steps one and two are performed insitu in a high density plasma (e.g., TCP--transformer coupled plasma) oxide etcher. Step 3, the polysilicon etch is performed in a different etcher (e.g., poly RIE etcher). A multi-layered...http://www.google.com/patents/US6156629?utm_source=gb-gplus-sharePatent US6156629 - Method for patterning a polysilicon gate in deep submicron technology
