The invention relates to a method and an apparatus for reducing memory resources in an integrated circuit. Typically, the integrated circuit chip is a complex programmable logic device architecture (CPLD). The integrated circuit includes a plurality of interconnection lines as well as a first type function...http://www.google.com/patents/US6362646?utm_source=gb-gplus-sharePatent US6362646 - Method and apparatus for reducing memory resources in a programmable logic device
